<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include/linux/pci-epc.h, branch dev-5.8-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.8-intel</id>
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<updated>2020-05-22T11:35:07+00:00</updated>
<entry>
<title>PCI: endpoint: Add support to handle multiple base for mapping outbound memory</title>
<updated>2020-05-22T11:35:07+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-05-07T12:33:16+00:00</published>
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<id>urn:sha1:d45e3c1a5979efd40dbbac9a5c3586f4fa41f734</id>
<content type='text'>
R-Car PCIe controller has support to map multiple memory regions for
mapping the outbound memory in local system also the controller limits
single allocation for each region (that is, once a chunk is used from the
region it cannot be used to allocate a new one). This features inspires to
add support for handling multiple memory bases in endpoint framework.

With this patch pci_epc_mem_init() initializes address space for endpoint
controller which support single window and pci_epc_multi_mem_init()
initializes multiple windows supported by endpoint controller.

Link: https://lore.kernel.org/r/1588854799-13710-6-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Pass page size as argument to pci_epc_mem_init()</title>
<updated>2020-05-11T10:29:48+00:00</updated>
<author>
<name>Lad Prabhakar</name>
<email>prabhakar.mahadev-lad.rj@bp.renesas.com</email>
</author>
<published>2020-05-07T12:33:15+00:00</published>
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<id>urn:sha1:975cf23e3aa89588cbfc9ad6f2b23bd32af4edc7</id>
<content type='text'>
pci_epc_mem_init() internally used page size equal to *PAGE_SIZE* to
manage the address space so instead just pass the page size as a
argument to pci_epc_mem_init().

Also make pci_epc_mem_init() as a C function instead of a macro function
in preparation for adding support for pci-epc-mem core to handle multiple
windows.

Link: https://lore.kernel.org/r/1588854799-13710-5-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Lad Prabhakar &lt;prabhakar.mahadev-lad.rj@bp.renesas.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Fix -&gt;set_msix() to take BIR and offset as arguments</title>
<updated>2020-04-02T16:57:10+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-02-25T08:17:01+00:00</published>
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<id>urn:sha1:83153d9f36e24978c6211d246cb6f532bf54e5dc</id>
<content type='text'>
commit 8963106eabdc ("PCI: endpoint: Add MSI-X interfaces") while
adding support to raise MSI-X interrupts from endpoint didn't include
BAR Indicator register (BIR) configuration and MSI-X table offset as
arguments in pci_epc_set_msix(). This would result in endpoint
controller register using random BAR indicator register, the memory
for which might not be allocated by the endpoint function driver.
Add BAR indicator register and MSI-X table offset as arguments in
pci_epc_set_msix() and allocate space for MSI-X table and pending
bit array (PBA) in pci-epf-test endpoint function driver.

Fixes: 8963106eabdc ("PCI: endpoint: Add MSI-X interfaces")
Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Add notification for core init completion</title>
<updated>2020-02-25T12:02:25+00:00</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2020-02-17T12:10:34+00:00</published>
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<id>urn:sha1:0ef22dcf0c1871888c4c0ee46a9d9c494f2fe997</id>
<content type='text'>
Add support to send notifications to EPF from EPC once the core
registers initialization is complete.

Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Add core init notifying feature</title>
<updated>2020-02-25T12:01:18+00:00</updated>
<author>
<name>Vidya Sagar</name>
<email>vidyas@nvidia.com</email>
</author>
<published>2020-02-17T12:10:32+00:00</published>
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<id>urn:sha1:3d5f7d9f6a38ddcc105ebfb23b640630bbabba65</id>
<content type='text'>
Add a new feature core_init_notifier for cores that can notify about
their availability for initialization.

Signed-off-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Acked-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Assign function number for each PF in EPC core</title>
<updated>2020-02-24T10:15:45+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-02-24T09:53:38+00:00</published>
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<id>urn:sha1:2499ee84e02774a8573b7b4c76c8f2ea38669313</id>
<content type='text'>
The PCIe endpoint core relies on the drivers that invoke the
pci_epc_add_epf() API to allocate and assign a function number
to each physical function (PF). Since endpoint function device can
be created by multiple mechanisms (configfs, devicetree, etc..),
allowing each of these mechanisms to assign a function number
would result in mutliple endpoint function devices having the
same function number. In order to avoid this, let EPC core assign
a function number to the endpoint device.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Fix for concurrent memory allocation in OB address region</title>
<updated>2020-02-24T10:13:48+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-02-24T09:53:36+00:00</published>
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<id>urn:sha1:04e046ca57ebed3943422dee10eec9e73aec081e</id>
<content type='text'>
pci-epc-mem uses a bitmap to manage the Endpoint outbound (OB) address
region. This address region will be shared by multiple endpoint
functions (in the case of multi function endpoint) and it has to be
protected from concurrent access to avoid updating an inconsistent state.

Use a mutex to protect bitmap updates to prevent the memory
allocation API from returning incorrect addresses.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: stable@vger.kernel.org # v4.14+
</content>
</entry>
<entry>
<title>PCI: endpoint: Replace spinlock with mutex</title>
<updated>2020-02-24T10:07:52+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-02-24T09:53:35+00:00</published>
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<id>urn:sha1:3d3248dbd018502f654064c78efcd2e165ab3486</id>
<content type='text'>
The pci_epc_ops is not intended to be invoked from interrupt context.
Hence replace spin_lock_irqsave and spin_unlock_irqrestore with
mutex_lock and mutex_unlock respectively.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: endpoint: Use notification chain mechanism to notify EPC events to EPF</title>
<updated>2020-02-24T10:07:06+00:00</updated>
<author>
<name>Kishon Vijay Abraham I</name>
<email>kishon@ti.com</email>
</author>
<published>2020-02-24T09:53:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5779dd0a7dbd71e82478fb0bf125cc6cd3c43266'/>
<id>urn:sha1:5779dd0a7dbd71e82478fb0bf125cc6cd3c43266</id>
<content type='text'>
Use atomic_notifier_call_chain() to notify EPC events like linkup to EPF
driver instead of using linkup ops in EPF driver. This is in preparation
for adding proper locking mechanism to EPF ops. This will also enable to
add more events (in addition to linkup) in the future.

Signed-off-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Tested-by: Vidya Sagar &lt;vidyas@nvidia.com&gt;
</content>
</entry>
<entry>
<title>PCI: Add PCI_STD_NUM_BARS for the number of standard BARs</title>
<updated>2019-10-14T15:22:26+00:00</updated>
<author>
<name>Denis Efremov</name>
<email>efremov@linux.com</email>
</author>
<published>2019-09-27T23:43:08+00:00</published>
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<id>urn:sha1:c9c13ba428ef90a9b408a6cdf874e14ab5754516</id>
<content type='text'>
Code that iterates over all standard PCI BARs typically uses
PCI_STD_RESOURCE_END.  However, that requires the unusual test
"i &lt;= PCI_STD_RESOURCE_END" rather than something the typical
"i &lt; PCI_STD_NUM_BARS".

Add a definition for PCI_STD_NUM_BARS and change loops to use the more
idiomatic C style to help avoid fencepost errors.

Link: https://lore.kernel.org/r/20190927234026.23342-1-efremov@linux.com
Link: https://lore.kernel.org/r/20190927234308.23935-1-efremov@linux.com
Link: https://lore.kernel.org/r/20190916204158.6889-3-efremov@linux.com
Signed-off-by: Denis Efremov &lt;efremov@linux.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Sebastian Ott &lt;sebott@linux.ibm.com&gt;			# arch/s390/
Acked-by: Bartlomiej Zolnierkiewicz &lt;b.zolnierkie@samsung.com&gt;	# video/fbdev/
Acked-by: Gustavo Pimentel &lt;gustavo.pimentel@synopsys.com&gt;	# pci/controller/dwc/
Acked-by: Jack Wang &lt;jinpu.wang@cloud.ionos.com&gt;		# scsi/pm8001/
Acked-by: Martin K. Petersen &lt;martin.petersen@oracle.com&gt;	# scsi/pm8001/
Acked-by: Ulf Hansson &lt;ulf.hansson@linaro.org&gt;			# memstick/
</content>
</entry>
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