BMC/Intel-BMC/linux.git/include/linux/mfd, branch dev-5.10-intel

Merge branch 'dev-5.10' into dev-5.10-intel

2021-09-07T21:25:02+00:00

Pull 5.10.60 stable from OpenBMC upstream Signed-off-by: Jae Hyun Yoo

regulator: rt5033: Fix n_voltages settings for BUCK and LDO

2021-08-08T07:05:22+00:00

[ Upstream commit 6549c46af8551b346bcc0b9043f93848319acd5c ] For linear regulators, the n_voltages should be (max - min) / step + 1. Buck voltage from 1v to 3V, per step 100mV, and vout mask is 0x1f. If value is from 20 to 31, the voltage will all be fixed to 3V. And LDO also, just vout range is different from 1.2v to 3v, step is the same. If value is from 18 to 31, the voltage will also be fixed to 3v. Signed-off-by: Axel Lin Reviewed-by: ChiYuan Huang Link: https://lore.kernel.org/r/20210627080418.1718127-1-axel.lin@ingics.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

mfd: peci: Add ICX-D generation info

2021-08-02T16:04:00+00:00

This commit adds CPU generation info for ICX-D Xeon family. Signed-off-by: Saravanan Palanisamy Signed-off-by: Anoop S

mfd: peci: Add ICX generation info

2021-08-02T16:04:00+00:00

This commit adds CPU generation info for ICX family. Signed-off-by: Jae Hyun Yoo

hwmon: peci: PCS utils

2021-08-02T16:04:00+00:00

1. Helpers for reading/writing PCS registers added. 2. PECI sensor configuration structure definition and helpers added. 3. New PECI PCS index and parameters definitions added. Tested: * on WilsonCity platform * hwmon/peci modules work as before the change Signed-off-by: Zbigniew Lukwinski

mfd: intel-peci-client: Add Intel PECI client driver

2021-08-02T16:04:00+00:00

This commit adds Intel PECI client driver. Signed-off-by: Jae Hyun Yoo

power: supply: ab8500: Fix an old bug

2021-07-19T07:45:00+00:00

commit f1c74a6c07e76fcb31a4bcc1f437c4361a2674ce upstream. Trying to get the AB8500 charging driver working I ran into a bit of bitrot: we haven't used the driver for a while so errors in refactorings won't be noticed. This one is pretty self evident: use argument to the macro or we end up with a random pointer to something else. Cc: stable@vger.kernel.org Cc: Krzysztof Kozlowski Cc: Marcus Cooper Fixes: 297d716f6260 ("power_supply: Change ownership from driver to core") Signed-off-by: Linus Walleij Signed-off-by: Sebastian Reichel Signed-off-by: Greg Kroah-Hartman

regulator: bd70528: Fix off-by-one for buck123 .n_voltages setting

2021-06-23T12:42:47+00:00

[ Upstream commit 0514582a1a5b4ac1a3fd64792826d392d7ae9ddc ] The valid selectors for bd70528 bucks are 0 ~ 0xf, so the .n_voltages should be 16 (0x10). Use 0x10 to make it consistent with BD70528_LDO_VOLTS. Also remove redundant defines for BD70528_BUCK_VOLTS. Signed-off-by: Axel Lin Acked-by: Matti Vaittinen Link: https://lore.kernel.org/r/20210523071045.2168904-1-axel.lin@ingics.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

regulator: bd71828: Fix .n_voltages settings

2021-06-16T10:01:43+00:00

commit 4c668630bf8ea90a041fc69c9984486e0f56682d upstream. Current .n_voltages settings do not cover the latest 2 valid selectors, so it fails to set voltage for the hightest voltage support. The latest linear range has step_uV = 0, so it does not matter if we count the .n_voltages to maximum selector + 1 or the first selector of latest linear range + 1. To simplify calculating the n_voltages, let's just set the .n_voltages to maximum selector + 1. Fixes: 522498f8cb8c ("regulator: bd71828: Basic support for ROHM bd71828 PMIC regulators") Signed-off-by: Axel Lin Reviewed-by: Matti Vaittinen Link: https://lore.kernel.org/r/20210523071045.2168904-2-axel.lin@ingics.com Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman

mfd: da9063: Support SMBus and I2C mode

2021-05-11T12:47:31+00:00

[ Upstream commit 586478bfc9f7e16504d6f64cf18bcbdf6fd0cbc9 ] By default the PMIC DA9063 2-wire interface is SMBus compliant. This means the PMIC will automatically reset the interface when the clock signal ceases for more than the SMBus timeout of 35 ms. If the I2C driver / device is not capable of creating atomic I2C transactions, a context change can cause a ceasing of the clock signal. This can happen if for example a real-time thread is scheduled. Then the DA9063 in SMBus mode will reset the 2-wire interface. Subsequently a write message could end up in the wrong register. This could cause unpredictable system behavior. The DA9063 PMIC also supports an I2C compliant mode for the 2-wire interface. This mode does not reset the interface when the clock signal ceases. Thus the problem depicted above does not occur. This patch tests for the bus functionality "I2C_FUNC_I2C". It can reasonably be assumed that the bus cannot obey SMBus timings if this functionality is set. SMBus commands most probably are emulated in this case which is prone to the latency issue described above. This patch enables the I2C bus mode if I2C_FUNC_I2C is set or otherwise keeps the default SMBus mode. Signed-off-by: Hubert Streidl Signed-off-by: Mark Jonas Reviewed-by: Wolfram Sang Signed-off-by: Lee Jones Signed-off-by: Sasha Levin