<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/include/linux/irqdomain.h, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-18T05:13:41+00:00</updated>
<entry>
<title>Merge tag 'staging-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging</title>
<updated>2016-03-18T05:13:41+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-03-18T05:13:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9dffdb38d864ae89e16ff7b3a09451270736e35b'/>
<id>urn:sha1:9dffdb38d864ae89e16ff7b3a09451270736e35b</id>
<content type='text'>
Pull staging driver updates from Greg KH:
 "Here is the big staging driver pull request for 4.6-rc1.

  Lots of little things here, over 1600 patches or so.  Notable is all
  of the good Lustre work happening, those developers have finally woken
  up and are cleaning up their code greatly.  The Outreachy intern
  application process is also happening, which brought in another 400 or
  so patches.  Full details are in the very long shortlog.

  All of these have been in linux-next with no reported issues"

* tag 'staging-4.6-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging: (1673 commits)
  staging: lustre: fix aligments in lnet selftest
  staging: lustre: report minimum of two buffers for LNet selftest load test
  staging: lustre: test for proper errno code in lstcon_rpc_trans_abort
  staging: lustre: filter remaining extra spacing for lnet selftest
  staging: lustre: remove extra spacing when setting variable for lnet selftest
  staging: lustre: remove extra spacing of variable declartions for lnet selftest
  staging: lustre: fix spacing issues checkpatch reported in lnet selftest
  staging: lustre: remove returns in void function for lnet selftest
  staging: lustre: fix bogus lst errors for lnet selftest
  staging: netlogic: Replacing pr_err with dev_err after the call to devm_kzalloc
  staging: mt29f_spinand: Replacing pr_info with dev_info after the call to devm_kzalloc
  staging: android: ion: fix up file mode
  staging: ion: debugfs invalid gfp mask
  staging: rts5208: Replace pci_enable_device with pcim_enable_device
  Staging: ieee80211: Place constant on right side of the test.
  staging: speakup: Replace del_timer with del_timer_sync
  staging: lowmemorykiller: fix 2 checks that checkpatch complained
  staging: mt29f_spinand: Drop void pointer cast
  staging: rdma: hfi1: file_ops: Replace ALIGN with PAGE_ALIGN
  staging: rdma: hfi1: driver: Replace IS_ALIGNED with PAGE_ALIGNED
  ...
</content>
</entry>
<entry>
<title>genirq: Add a new generic IPI reservation code to irq core</title>
<updated>2016-02-25T09:56:56+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d17bf24e695290d3fe7943aca52ab48098a10653'/>
<id>urn:sha1:d17bf24e695290d3fe7943aca52ab48098a10653</id>
<content type='text'>
Add a generic mechanism to dynamically allocate an IPI. Depending on the
underlying implementation this creates either a single Linux irq or a
consective range of Linux irqs. The Linux irq is used later to send IPIs to
other CPUs.

[ tglx: Massaged the code and removed the 'consecutive mask' restriction for
  	the single IRQ case ]

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-9-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>genirq: Make irq_domain_alloc_descs() non static</title>
<updated>2016-02-25T09:56:56+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ac0a0cd266d1f21236d5975ca6bced9b377a2a6a'/>
<id>urn:sha1:ac0a0cd266d1f21236d5975ca6bced9b377a2a6a</id>
<content type='text'>
We will need to use this function to implement irq_reserve_ipi() later. So
make it non static and move the prototype to irqdomain.h to allow using it
outside irqdomain.c

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-8-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>genirq: Add DOMAIN_BUS_IPI</title>
<updated>2016-02-25T09:56:55+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=29d5c8db26ad54592436508819ac617119306f96'/>
<id>urn:sha1:29d5c8db26ad54592436508819ac617119306f96</id>
<content type='text'>
We need a way to search and match IPI domains.

Using the new enum we can use irq_find_matching_host() to do that.

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-3-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>genirq: Add new IPI irqdomain flags</title>
<updated>2016-02-25T09:56:55+00:00</updated>
<author>
<name>Qais Yousef</name>
<email>qais.yousef@imgtec.com</email>
</author>
<published>2015-12-08T13:20:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0abefbaab4edbcec637e00fefcdeccb52797fe4f'/>
<id>urn:sha1:0abefbaab4edbcec637e00fefcdeccb52797fe4f</id>
<content type='text'>
These flags will be used to identify an IPI domain. We have two flavours of
IPI implementations:

IRQ_DOMAIN_FLAG_IPI_PER_CPU: Each CPU has its own virq and hwirq
IRQ_DOMAIN_FLAG_IPI_SINGLE : A single virq and hwirq for all CPUs

Signed-off-by: Qais Yousef &lt;qais.yousef@imgtec.com&gt;
Cc: &lt;jason@lakedaemon.net&gt;
Cc: &lt;marc.zyngier@arm.com&gt;
Cc: &lt;jiang.liu@linux.intel.com&gt;
Cc: &lt;ralf@linux-mips.org&gt;
Cc: &lt;linux-mips@linux-mips.org&gt;
Cc: &lt;lisa.parratt@imgtec.com&gt;
Cc: Qais Yousef &lt;qsyousef@gmail.com&gt;
Link: http://lkml.kernel.org/r/1449580830-23652-2-git-send-email-qais.yousef@imgtec.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>irqdomain: Added domain bus token DOMAIN_BUS_FSL_MC_MSI</title>
<updated>2016-02-08T03:10:12+00:00</updated>
<author>
<name>J. German Rivera</name>
<email>German.Rivera@freescale.com</email>
</author>
<published>2016-01-06T22:03:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9b1b282ccd8195e3264dbb3cd15b9d60b6345230'/>
<id>urn:sha1:9b1b282ccd8195e3264dbb3cd15b9d60b6345230</id>
<content type='text'>
Since an FSL-MC bus is a new bus type that is neither PCI nor
PLATFORM, we need a new domain bus token to disambiguate the
IRQ domain for FSL-MC MSIs.

Signed-off-by: J. German Rivera &lt;German.Rivera@freescale.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>irqdomain: Allow domain lookup with DOMAIN_BUS_WIRED token</title>
<updated>2016-01-26T15:00:14+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2016-01-26T13:52:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=530cbe100ef7587aa5b5ac3a4b670cda4d50e598'/>
<id>urn:sha1:530cbe100ef7587aa5b5ac3a4b670cda4d50e598</id>
<content type='text'>
Let's take the (outlandish) example of an interrupt controller
capable of handling both wired interrupts and PCI MSIs.

With the current code, the PCI MSI domain is going to be tagged
with DOMAIN_BUS_PCI_MSI, and the wired domain with DOMAIN_BUS_ANY.

Things get hairy when we start looking up the domain for a wired
interrupt (typically when creating it based on some firmware
information - DT or ACPI).

In irq_create_fwspec_mapping(), we perform the lookup using
DOMAIN_BUS_ANY, which is actually used as a wildcard. This gives
us one chance out of two to end up with the wrong domain, and
we try to configure a wired interrupt with the MSI domain.
Everything grinds to a halt pretty quickly.

What we really need to do is to start looking for a domain that
would uniquely identify a wired interrupt domain, and only use
DOMAIN_BUS_ANY as a fallback.

In order to solve this, let's introduce a new DOMAIN_BUS_WIRED
token, which is going to be used exactly as described above.
Of course, this depends on the irqchip to setup the domain
bus_token, and nobody had to implement this so far.

Only so far.

Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Cc: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Cc: Rob Herring &lt;robh+dt@kernel.org&gt;
Cc: Frank Rowand &lt;frowand.list@gmail.com&gt;
Cc: Grant Likely &lt;grant.likely@linaro.org&gt;
Cc: Thomas Petazzoni &lt;thomas.petazzoni@free-electrons.com&gt;
Cc: Jiang Liu &lt;jiang.liu@linux.intel.com&gt;
Link: http://lkml.kernel.org/r/1453816347-32720-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge branch 'irq/gic-v2m-acpi' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/core</title>
<updated>2015-12-29T09:08:45+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2015-12-29T09:08:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=92b86f92ed0307efbaea3c0e95520551848d3995'/>
<id>urn:sha1:92b86f92ed0307efbaea3c0e95520551848d3995</id>
<content type='text'>
Pull another round of GIC changes from Marc:

 ACPI support for GIV-v2m
</content>
</entry>
<entry>
<title>irqdomain: Introduce is_fwnode_irqchip helper</title>
<updated>2015-12-21T13:49:49+00:00</updated>
<author>
<name>Suravee Suthikulpanit</name>
<email>Suravee.Suthikulpanit@amd.com</email>
</author>
<published>2015-12-10T16:55:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=75aba7b0e9ac416ca53c0c97680b8e9aedf09284'/>
<id>urn:sha1:75aba7b0e9ac416ca53c0c97680b8e9aedf09284</id>
<content type='text'>
Since there will be several places checking if fwnode.type
is equal FWNODE_IRQCHIP, this patch adds a convenient function
for this purpose.

Acked-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
<entry>
<title>acpi: pci: Setup MSI domain for ACPI based pci devices</title>
<updated>2015-12-21T13:49:32+00:00</updated>
<author>
<name>Suravee Suthikulpanit</name>
<email>Suravee.Suthikulpanit@amd.com</email>
</author>
<published>2015-12-10T16:55:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=471036b2b895789c2305428fd879006468e4a758'/>
<id>urn:sha1:471036b2b895789c2305428fd879006468e4a758</id>
<content type='text'>
This patch introduces pci_msi_register_fwnode_provider() for irqchip
to register a callback, to provide a way to determine appropriate MSI
domain for a pci device.

It also introduces pci_host_bridge_acpi_msi_domain(), which returns
the MSI domain of the specified PCI host bridge with DOMAIN_BUS_PCI_MSI
bus token. Then, it is assigned to pci device.

Reviewed-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Rafael J. Wysocki &lt;rjw@rjwysocki.net&gt;
Signed-off-by: Suravee Suthikulpanit &lt;Suravee.Suthikulpanit@amd.com&gt;
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
</content>
</entry>
</feed>
