BMC/Intel-BMC/linux.git/include/linux/clk/at91_pmc.h, branch dev-5.8

clk: at91: move sam9x60's PLL register offsets to PMC header

2020-02-18T20:47:54+00:00

Move SAM9X60's PLL register offsets to PMC header so that the definitions would also be available from arch/arm/mach-at91/pm_suspend.S. This is necessary to disable/enable PLLA for SAM9X60 on suspend/resume. Signed-off-by: Claudiu Beznea Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/1579522208-19523-7-git-send-email-claudiu.beznea@microchip.com

ARM: at91: pm: add pmc_version member to at91_pm_data

2020-02-18T20:47:54+00:00

This will be used to differentiate b/w different PLLs settings to be applied in the final/first steps of the suspend/resume process by doing PLL specific configurations. Signed-off-by: Claudiu Beznea Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni Link: https://lore.kernel.org/r/1579522208-19523-5-git-send-email-claudiu.beznea@microchip.com

treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152

2019-05-30T18:26:32+00:00

Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license as published by the free software foundation either version 2 of the license or at your option any later version extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 3029 file(s). Signed-off-by: Thomas Gleixner Reviewed-by: Allison Randal Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de Signed-off-by: Greg Kroah-Hartman

Merge tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into arm/late

2019-05-16T18:05:11+00:00

AT91 SoC for 5.2 - PM changes for SAM9X60 * tag 'at91-5.2-soc' of git://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: ARM: at91: pm: do not disable/enable PLLA for ULP modes ARM: at91: pm: disable RC oscillator in ULP0 ARM: at91: pm: add ULP1 support for SAM9X60 ARM: at91: pm: add support for per SoC wakeup source configuration ARM: at91: pm: keep at91_pm_backup_init() only for SAMA5D2 SoCs ARM: at91: pm: initial PM support for SAM9X60 dt-bindings: arm: atmel: add binding for SAM9X60 SoC ARM: at91: pm: introduce at91_soc_pm structure Signed-off-by: Olof Johansson

clk: at91: master: Add sam9x60 support

2019-04-25T19:34:05+00:00

The sam9x60 cpu clock is located at a different offset but is otherwise similar to the master clock. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd

clk: at91: allow configuring generated PCR layout

2019-04-25T19:34:03+00:00

The PCR register layout for GCLKCSS is changing for the future SoCs, allow configuring it. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd

clk: at91: allow configuring peripheral PCR layout

2019-04-25T19:34:03+00:00

The PCR register actually changed layout for each SoC. By chance, this didn't have impact on sama5d[2-4] support but since sama5d3, PID is seven bits wide and sama5d4 and sama5d2 don't have DIV. For the DT backward compatibility, keep the layout as is. Signed-off-by: Alexandre Belloni Signed-off-by: Stephen Boyd

ARM: at91: pm: add ULP1 support for SAM9X60

2019-03-28T10:05:53+00:00

Add ULP1 support for SAM9X60. In pm_suspend.S enable RC oscillator in PMC if it is not enabled. At resume the state before suspend is restored. Signed-off-by: Claudiu Beznea Acked-by: Stephen Boyd Signed-off-by: Alexandre Belloni Signed-off-by: Ludovic Desroches

ARM: at91: pm: add PMC fast startup registers defines

2018-07-17T13:08:07+00:00

Add PMC fast startup registers defines. Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni

ARM: at91: pm: Add ULP1 mode support

2018-07-17T13:08:02+00:00

In the ULP1 mode, in order to achieve the lowest power consumption with the system in retention mode and be able to resume on the wake up events, all the clocks are shut off, inclusive the embedded 12MHz RC oscillator, and the number of wake up sources is limited as well. When the wake up event is asserted, the embedded 12MHz RC oscillator restarts automatically. The ULP1 (Ultra Low-power mode 1) is introduced by SAMA5D2. The previous size of pm_suspend.o was 2148 bytes. With the addition of ULP1 mode the new size of pm_suspend.o raised at 2456 bytes. Signed-off-by: Wenyou Yang Signed-off-by: Ludovic Desroches [claudiu.beznea@microchip.com: aligned with 4.18-rc1] Signed-off-by: Claudiu Beznea Signed-off-by: Alexandre Belloni