Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.15-intel 2021-11-05T07:22:13+00:00 2021-11-05T07:22:13+00:00 Jae Hyun Yoo jae.hyun.yoo@intel.com 2021-01-12T16:57:11+00:00 urn:sha1:690a686539fab8d093292b403be9b28b9c62edb8 AST2600 A1 has separate reset control for LPC and eSPI so this commit fix the index definition to make it work on AST2600 A1. Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> 2021-11-05T07:22:10+00:00 Jae Hyun Yoo jae.hyun.yoo@intel.com 2020-05-07T01:11:29+00:00 urn:sha1:7b3be052d04ef830ab49db2c2b5bfb7ac42a7498 This commit ports I3C related changes from Aspeed SDK v00.05.05. It also includes Vitor's I3C cdev implementation which isn't upstreamed yet so it should be refined later. Signed-off-by: Ryan Chen <ryan_chen@aspeedtech.com> Signed-off-by: Vitor Soares <soares@synopsys.com> Signed-off-by: Jae Hyun Yoo <jae.hyun.yoo@intel.com> 2021-11-05T07:22:09+00:00 Kuiying Wang kuiying.wang@intel.com 2019-12-13T08:15:16+00:00 urn:sha1:057cdbfd1cf64959f6d4b7233005b6a35e2efc55 Tested: 1. Config baud rate to 921600 in BIOS setup page 2. BMC could change env variable "hostserialcfg" to 1. 3. BMC is force to reboot and SPA baud rate is changed to 921600 successfully. 4. It is same for back to 115200. Signed-off-by: Kuiying Wang <kuiying.wang@intel.com> 2021-11-05T07:22:06+00:00 Yong Li yong.b.li@linux.intel.com 2019-01-02T07:06:43+00:00 urn:sha1:51181b65c8d67612ac13e291173f118707f55c62 In order to support high speed baud rate(921600 bps), the default UART clock(24MHz) needs to be switched to 192MHz(from USB2.0 port1 PHY). Create a new 192M Hz clock and assign it to uart, based on uart clock source configuration in SCU4C. bootloader(u-boot) will set SCU4C based on the environment configuration Signed-off-by: Yong Li <yong.b.li@linux.intel.com> 2021-11-05T07:22:05+00:00 Vernon Mauery vernon.mauery@linux.intel.com 2019-09-12T07:55:39+00:00 urn:sha1:bda134ac56c65e4f45a1c930dfab43e1e5987987 Additions to the base g6 dtsi file for Aspeed ast2600 systems. This mostly includes entries for the drivers that are not upstream. Signed-off-by: Vernon Mauery <vernon.mauery@linux.intel.com> 2021-09-02T21:17:24+00:00 Linus Torvalds torvalds@linux-foundation.org 2021-09-02T21:17:24+00:00 urn:sha1:75d6e7d9ced83e937757e278c3ce1ccd6606a96a Pull clk updates from Stephen Boyd: "Nothing changed in the clk framework core this time around. We did get some updates to the basic clk types to use determine_rate for the divider type and add a power of two fractional divider flag though. Otherwise, this is a collection of clk driver updates. More than half the diffstat is in the Qualcomm clk driver where we add a bunch of data to describe clks on various SoCs and fix bugs. The other big new thing in here is the Mediatek MT8192 clk driver. That's been under review for a while and it's nice to see that it's finally upstream. Beyond that it's the usual set of minor fixes and tweaks to clk drivers. There are some non-clk driver bits in here which have all been acked by the respective maintainers. New Drivers: - Support video, gpu, display clks on qcom sc7280 SoCs - GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs - Multimedia clks (MMCC) on qcom MSM8994/MSM8992 - RPMh clks on qcom SM6350 SoCs - Support for Mediatek MT8192 SoCs - Add display (DU and DSI) clocks on Renesas R-Car V3U - Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and resets on Renesas RZ/G2L Updates: - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators - Add power of two flag to fractional divider clk type - Migrate some clk drivers to clk_divider_ops.determine_rate - Migrate to clk_parent_data in gcc-sdm660 - Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2 - Switch from .round_rate to .determine_rate in clk-divider-gate - Fix clock tree update for TF-A controlled clocks for all i.MX8M - Add missing M7 core clock for i.MX8MN - YAML conversion of rk3399 clock controller binding - Removal of GRF dependency for the rk3328/rk3036 pll types - Drop CLK_IS_CRITICAL flag from Tegra fuse clk - Make CLK_R9A06G032 Kconfig symbol invisible - Convert various DT bindings to YAML" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits) dt-bindings: clock: samsung: fix header path in example clk: tegra: fix old-style declaration clk: qcom: Add SM6350 GCC driver MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema dt-bindings: clock: samsung: convert Exynos AudSS to dtschema dt-bindings: clock: samsung: convert Exynos4 to dtschema dt-bindings: clock: samsung: convert Exynos3250 to dtschema dt-bindings: clock: samsung: convert Exynos542x to dtschema dt-bindings: clock: samsung: add bindings for Exynos external clock dt-bindings: clock: samsung: convert Exynos5250 to dtschema clk: vc5: Add properties for configuring SD/OE behavior clk: vc5: Use dev_err_probe dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin dt-bindings: clock: brcm,iproc-clocks: fix armpll properties clk: zynqmp: Fix kernel-doc format clk: at91: clk-generated: Limit the requested rate to our range clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates clk: zynqmp: Fix a memory leak clk: zynqmp: Check the return type ... 2021-09-02T01:34:51+00:00 Linus Torvalds torvalds@linux-foundation.org 2021-09-02T01:34:51+00:00 urn:sha1:9e5f3ffcf1cb34e7c7beb3f79a96f58536730924 Pull devicetree updates from Rob Herring: - Refactor arch kdump DT related code to a common implementation - Add fw_devlink tracking for 'phy-handle', 'leds', 'backlight', 'resets', and 'pwm' properties - Various clean-ups to DT FDT code - Fix a runtime error for !CONFIG_SYSFS - Convert Synopsys DW PCI and derivative binding docs to schemas. Add Toshiba Visconti PCIe binding. - Convert a bunch of memory controller bindings to schemas - Covert eeprom-93xx46, Samsung Exynos TRNG, Samsung Exynos IRQ combiner, arm-charlcd, img-ascii-lcd, UniPhier eFuse, Xilinx Zynq MPSoC FPGA, Xilinx Zynq MPSoC reset, Mediatek mmsys, Gemini boards, brcm,iproc-i2c, faraday,ftpci100, and ks8851 net to DT schema. - Extend nvmem bindings to handle bit offsets in unit-addresses - Add DT schemas for HiKey 970 PCIe PHY - Remove unused ZTE, energymicro,efm32-timer, and Exynos SATA bindings - Enable dtc pci_device_reg warning by default - Fixes for handling 'unevaluatedProperties' in preparation to enable pending support in the tooling for jsonschema 2020-12 draft * tag 'devicetree-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/robh/linux: (78 commits) dt-bindings: display: remove zte,vou.txt binding doc dt-bindings: hwmon: merge max1619 into trivial devices dt-bindings: mtd-physmap: Add 'arm,vexpress-flash' compatible dt-bindings: PCI: imx6: convert the imx pcie controller to dtschema dt-bindings: Use 'enum' instead of 'oneOf' plus 'const' entries dt-bindings: Add vendor prefix for Topic Embedded Systems of: fdt: Rename reserve_elfcorehdr() to fdt_reserve_elfcorehdr() arm64: kdump: Remove custom linux,usable-memory-range handling arm64: kdump: Remove custom linux,elfcorehdr handling riscv: Remove non-standard linux,elfcorehdr handling of: fdt: Use IS_ENABLED(CONFIG_BLK_DEV_INITRD) instead of #ifdef of: fdt: Add generic support for handling usable memory range property of: fdt: Add generic support for handling elf core headers property crash_dump: Make elfcorehdr address/size symbols always visible dt-bindings: memory: convert Samsung Exynos DMC to dtschema dt-bindings: devfreq: event: convert Samsung Exynos PPMU to dtschema dt-bindings: devfreq: event: convert Samsung Exynos NoCP to dtschema kbuild: Enable dtc 'pci_device_reg' warning by default dt-bindings: soc: remove obsolete zte zx header dt-bindings: clock: remove obsolete zte zx header ... 2021-09-01T22:39:09+00:00 Linus Torvalds torvalds@linux-foundation.org 2021-09-01T22:39:09+00:00 urn:sha1:7c636d4d20f8c5acfbfbc60f326fddb0e1cf5daa Pull ARM SoC DT updates from Arnd Bergmann: "As usual, the bulk of work in the SoC tree goes into DT files, this time with a roughly even split between 32-bit and 64-bit SoCs rather than the usual mostly 64-bit changes. New SoCs: - Microchip SAMA7 SoC family based on Cortex-A7, a new 32-bit platform based on the older SAMA5 series. - Qualcomm Snapdragon SDM636 and SM8150, variations of the existing phone SoCs. - Renesas R-Car H3e-2G and M3e-2G SoCs, variations of older Renesas SoCs. New boards: - Marvell CN913x reference boards - ASpeed AST2600 BMC implementations for Facebook Cloudripper, Elbert and Fuji server boards. - Snapdragon 665 based Sony Xperia 10II - Snapdragon MSM8916 based Xiaomi Redmi 2 - Snapdragon MSM8226 based Samsung Galaxy S3 Neo - NXP i.MX based 32-bit boards: - DHCOM based PicoITX - DHSOM based DRC0ỉ - SolidRun SolidSense - SKOV i.MX6 boards. - NXP i.MX based 64-bit boards: - Nitrogen8 SoM and MNT Reform2 - LS1088A based Traverse Ten64 - i.MX8M based GW7902. - NVIDIA Jetson TX2 NX Developer Kit - 4KOpen STiH418-b2264 development board - ux500 based Samsung phones: Gavini, Codina and Kyle - TI AM335x based Sancloud BBE Lite - ixp4xx dts files to replace all old board files Other changes: - Treewide fixes for dtc warnings - Rockchips i/o domain support - TI OMAP/AM3 CPSW switch driver support - Improved device support for allwinner, aspeed, qualcomm, NXP, nvidia, Renesas, Samsung, Amlogic, Mediatek, ixp4xx, stm32, sti, OMAP and actions" * tag 'dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (412 commits) arm/arm64: dts: Fix remaining dtc 'unit_address_format' warnings ARM: dts: rockchip: Add SFC to RV1108 arm64: dts: marvell: armada-37xx: Extend PCIe MEM space ARM: dts: aspeed: p10bmc: Add power control pins ARM: dts: aspeed: cloudripper: Add comments for "mdio1" ARM: dts: aspeed: minipack: Update flash partition table dt-bindings: arm: fsl: Add Traverse Ten64 (LS1088A) board dt-bindings: vendor-prefixes: add Traverse Technologies arm64: dts: add device tree for Traverse Ten64 (LS1088A) arm64: dts: ls1088a: add missing PMU node arm64: dts: ls1088a: add internal PCS for DPMAC1 node ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node ARM: dts: add SKOV imx6q and imx6dl based boards dt-bindings: arm: fsl: add SKOV imx6q and imx6dl based boards dt-bindings: vendor-prefixes: Add an entry for SKOV A/S arm64: dts: imx8mq-reform2: add sound support arm64: dts: imx8m: drop interrupt-affinity for pmu arm64: dts: imx8qxp: update pmu compatible arm64: dts: imx8mm: update pmu compatible ... 2021-09-01T22:27:07+00:00 Stephen Boyd sboyd@kernel.org 2021-09-01T22:27:07+00:00 urn:sha1:47505bf3a82166c3576155c229e941af922bf147 * clk-kirkwood: clk: kirkwood: Fix a clocking boot regression * clk-imx: clk: imx8mn: Add M7 core clock clk: imx8m: fix clock tree update of TF-A managed clocks clk: imx: clk-divider-gate: Switch to clk_divider.determine_rate clk: imx8mn: use correct mux type for clkout path clk: imx8mm: use correct mux type for clkout path * clk-doc: dt-bindings: clock: samsung: fix header path in example MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema dt-bindings: clock: samsung: convert Exynos AudSS to dtschema dt-bindings: clock: samsung: convert Exynos4 to dtschema dt-bindings: clock: samsung: convert Exynos3250 to dtschema dt-bindings: clock: samsung: convert Exynos542x to dtschema dt-bindings: clock: samsung: add bindings for Exynos external clock dt-bindings: clock: samsung: convert Exynos5250 to dtschema dt-bindings: clock: brcm,iproc-clocks: fix armpll properties clk: zynqmp: Fix kernel-doc format clk: at91: sama7g5: remove all kernel-doc & kernel-doc warnings clk: zynqmp: fix kernel doc * clk-zynq: clk: zynqmp: Fix a memory leak clk: zynqmp: Check the return type * clk-ralink: clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates 2021-09-01T22:26:58+00:00 Stephen Boyd sboyd@kernel.org 2021-09-01T22:26:58+00:00 urn:sha1:8fb59ce15c43d025dadc2df3d21590bd1e91eff0 - Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators * clk-nvidia: clk: tegra: fix old-style declaration clk: tegra: Remove CLK_IS_CRITICAL flag from fuse clock soc/tegra: fuse: Enable fuse clock on suspend for Tegra124 soc/tegra: fuse: Add runtime PM support soc/tegra: fuse: Clear fuse->clk on driver probe failure soc/tegra: pmc: Prevent racing with cpuilde driver soc/tegra: bpmp: Remove unused including <linux/version.h> * clk-rockchip: clk: rockchip: make rk3308 ddrphy4x clock critical clk: rockchip: drop GRF dependency for rk3328/rk3036 pll types dt-bindings: clk: Convert rockchip,rk3399-cru to DT schema clk: rockchip: Add support for hclk_sfc on rk3036 clk: rockchip: rk3036: fix up the sclk_sfc parent error clk: rockchip: add dt-binding clkid for hclk_sfc on rk3036 * clk-at91: clk: at91: clk-generated: Limit the requested rate to our range * clk-vc5: clk: vc5: Add properties for configuring SD/OE behavior clk: vc5: Use dev_err_probe dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin