BMC/Intel-BMC/linux.git/drivers, branch dev-4.6

Revert "HACK: gpio-aspeed: Request pins via pinctrl"

2016-07-21T15:05:11+00:00

This reverts commit 3ab5ce11fbc786236b0edf0c2344595455ac3d04. Signed-off-by: Joel Stanley

Revert "gpio-aspeed: Add offset to base on pinctrl_{request,free}_gpio()"

2016-07-21T15:04:59+00:00

This reverts commit 6e0489784e1d9ae0ec95ad77239a4cff3fa0b6ef. Signed-off-by: Joel Stanley

Merge tag 'v4.6.4' into dev-4.6

2016-07-12T10:03:22+00:00

This is the 4.6.4 stable release

i2c/aspeed: Do not enable SMBUS Alert IRQ

2016-07-12T09:59:33+00:00

We do not handle this in our driver, so do not enable the IRQ. TODO: Investigate why the whiterspoon board was asserting this IRQ. Signed-off-by: Joel Stanley

drivers/i2c/i2c-aspeed: Only use IRQ status for command completion notification

2016-07-12T09:59:24+00:00

We currently determine if an i2c command as complete by looking at the command register (and comparing it with the pending set of commands). While this may indicate that all pending commands have completed, we may still get a further interrupt when multiple commands (like a read + stop) have been queued. This change uses the interrupt status to indicate command completion, instead of the command register. Signed-off-by: Jeremy Kerr Signed-off-by: Joel Stanley

drivers/net/ftgmac100: Adapt for Aspeed SoCs

2016-07-12T09:58:20+00:00

The RXDES and TXDES registers bits in the ftgmac100 indicates EDO{R,T}R at bit position 15 for the Faraday Tech IP. However, the version of this IP present in the Aspeed SoCs has these bits at position 30 in the registers. It appers that ast2400 SoCs support both positions, with the 15th bit marked as reserved but still functional. In the ast2500 this bit is reused for another function, so we need a work around. This was confirmed with engineers from Aspeed that using bit 30 is correct for both the ast2400 and ast2500 SoCs. Signed-off-by: Joel Stanley

drivers/net/ftgmac100: Make EDO{R,T}R bits configurable

2016-07-12T09:58:07+00:00

These bits are #defined at a fixed location. In order to support future hardware that has chosen to move these bits around move the bits into a member of the struct ftgmac100. Signed-off-by: Andrew Jeffery Signed-off-by: Joel Stanley

drievrs/net/ftgmac100: Separate rx page storage from rxdesc

2016-07-12T09:58:01+00:00

The ftgmac100 hardware revision in e.g. the Aspeed AST2500 no longer reserves all bits in RXDES#2 but instead uses the bottom 16 bits to store MAC frame metadata. Avoid corruption by shifting struct page pointers out to their own member in struct ftgmac100. Signed-off-by: Andrew Jeffery Signed-off-by: Joel Stanley

net/ethernet/ftgmac100: Warn when nc-si enabled

2016-07-12T09:57:50+00:00

When a driver indicates it wants to use nc-si in the device tree but the kerenl does not have it enabled the driver currently silently fails. Signed-off-by: Joel Stanley

usb: dwc3: exynos: Fix deferred probing storm.

2016-07-11T16:30:02+00:00

commit 4879efb34f7d49235fac334d76d9c6a77a021413 upstream. dwc3-exynos has two problems during init if the regulators are slow to come up (for instance if the I2C bus driver is not on the initramfs) and return probe deferral. First, every time this happens, the driver leaks the USB phys created; they need to be deallocated on error. Second, since the phy devices are created before the regulators fail, this means that there's a new device to re-trigger deferred probing, which causes it to essentially go into a busy loop of re-probing the device until the regulators come up. Move the phy creation to after the regulators have succeeded, and also fix cleanup on failure. On my ODROID XU4 system (with Debian's initramfs which doesn't contain the I2C driver), this reduces the number of probe attempts (for each of the two controllers) from more than 2000 to eight. Signed-off-by: Steinar H. Gunderson Reviewed-by: Krzysztof Kozlowski Reviewed-by: Vivek Gautam Fixes: d720f057fda4 ("usb: dwc3: exynos: add nop transceiver support") Signed-off-by: Felipe Balbi Signed-off-by: Greg Kroah-Hartman