BMC/Intel-BMC/linux.git/drivers/tty/serial/serial-tegra.c, branch dev-5.8

serial: tegra: drop bogus NULL tty-port checks

2020-07-21T18:59:38+00:00

The struct tty_port is part of the uart state and will never be NULL in the receive helpers. Drop the bogus NULL checks and rename the pointer-variables "port" to differentiate them from struct tty_struct pointers (which can be NULL). Fixes: 962963e4ee23 ("serial: tegra: Switch to using struct tty_port") Signed-off-by: Johan Hovold Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20200710135947.2737-3-johan@kernel.org Signed-off-by: Greg Kroah-Hartman

serial: tegra: fix CREAD handling for PIO

2020-07-21T18:58:25+00:00

Commit 33ae787b74fc ("serial: tegra: add support to ignore read") added support for dropping input in case CREAD isn't set, but for PIO the ignore_status_mask wasn't checked until after the character had been put in the receive buffer. Note that the NULL tty-port test is bogus and will be removed by a follow-on patch. Fixes: 33ae787b74fc ("serial: tegra: add support to ignore read") Cc: stable # 5.4 Cc: Shardar Shariff Md Cc: Krishna Yarlagadda Signed-off-by: Johan Hovold Acked-by: Thierry Reding Link: https://lore.kernel.org/r/20200710135947.2737-2-johan@kernel.org Signed-off-by: Greg Kroah-Hartman

tty: serial: tegra: Handle RX transfer in PIO mode if DMA wasn't started

2020-02-10T20:32:13+00:00

It is possible to get an instant RX timeout or end-of-transfer interrupt before RX DMA was started, if transaction is less than 16 bytes. Transfer should be handled in PIO mode in this case because DMA can't handle it. This patch brings back the original behaviour of the driver that was changed by accident by a previous commit, it fixes occasional Bluetooth HW initialization failures which I started to notice recently. Fixes: d5e3fadb7012 ("tty: serial: tegra: Activate RX DMA transfer by request") Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20200209164415.9632-1-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

tty: serial: tegra: Optimize DMA buffer synchronization

2020-01-14T13:07:50+00:00

Synchronize only the dirty part of DMA buffer in order to avoid unnecessary overhead of syncing of the clean part, which is the case of every serial DMA transfer in practice. Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20200112180919.5194-3-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

tty: serial: tegra: Activate RX DMA transfer by request

2020-01-14T13:07:50+00:00

This allows DMA engine to go into runtime-suspended mode whenever there is no data to receive, instead of keeping DMA active all the time while TTY is opened (i.e. permanently active in practice, like in the case of UART Bluetooth). Signed-off-by: Dmitry Osipenko Link: https://lore.kernel.org/r/20200112180919.5194-2-digetx@gmail.com Signed-off-by: Greg Kroah-Hartman

tty: serial: tegra: Use dma_request_chan() directly for channel request

2019-11-13T13:54:16+00:00

dma_request_slave_channel_reason() is: #define dma_request_slave_channel_reason(dev, name) \ dma_request_chan(dev, name) Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20191113094618.1725-4-peter.ujfalusi@ti.com Signed-off-by: Greg Kroah-Hartman

serial: tegra: Add PIO mode support

2019-09-05T08:00:05+00:00

Add PIO mode support in receive and transmit path with RX interrupt trigger of 16 bytes for Tegra194 and older chips. Signed-off-by: Shardar Shariff Md Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/1567572187-29820-13-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman

serial: tegra: report clk rate errors

2019-09-05T08:00:05+00:00

Standard UART controllers support +/-4% baud rate error tolerance. Tegra186 only supports 0% to +4% error tolerance whereas other Tegra chips support standard +/-4% rate. Add chip data for knowing error tolerance level for each soc. Creating new compatible for Tegra194 chip as it supports baud rate error tolerance of -2 to +2%, different from older chips. Signed-off-by: Shardar Shariff Md Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/1567572187-29820-12-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman

serial: tegra: add support to adjust baud rate

2019-09-05T08:00:05+00:00

Add support to adjust baud rates to fall under supported tolerance range through DT. Tegra186 chip has a hardware issue resulting in frame errors when tolerance level for baud rate is negative. Provided entries to adjust baud rate to be within acceptable range and work with devices that can send negative baud rate. Also report error when baud rate set is out of tolerance range of controller updated in device tree. Signed-off-by: Shardar Shariff Md Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/1567572187-29820-11-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman

serial: tegra: add support to use 8 bytes trigger

2019-09-05T08:00:05+00:00

Add support to use 8 bytes trigger for Tegra186 SOC. Signed-off-by: Shardar Shariff Md Signed-off-by: Krishna Yarlagadda Link: https://lore.kernel.org/r/1567572187-29820-9-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman