BMC/Intel-BMC/linux.git/drivers/spi, branch dev-5.15-intel

Merge tag 'v5.15.36' into dev-5.15

2022-04-28T01:48:30+00:00

This is the 5.15.36 stable release Signed-off-by: Joel Stanley

spi: atmel-quadspi: Fix the buswidth adjustment between spi-mem and controller

2022-04-27T12:39:02+00:00

commit 8c235cc25087495c4288d94f547e9d3061004991 upstream. Use the spi_mem_default_supports_op() core helper in order to take into account the buswidth specified by the user in device tree. Cc: Fixes: 0e6aae08e9ae ("spi: Add QuadSPI driver for Atmel SAMA5D2") Signed-off-by: Tudor Ambarus Link: https://lore.kernel.org/r/20220406133604.455356-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman

spi: cadence-quadspi: fix incorrect supports_op() return value

2022-04-27T12:38:52+00:00

[ Upstream commit f1d388f216aeb41a5df518815ae559d14a6d438e ] Since the conversion to spi-mem, the driver advertised support for various operations that cqspi_set_protocol() was never expected to handle correctly - in particuar all non-DTR operations with command or address buswidth > 1. For DTR, all operations except for 8-8-8 would fail, as cqspi_set_protocol() returns -EINVAL. In non-DTR mode, this resulted in data corruption for SPI-NOR flashes that support such operations. As a minimal fix that can be backported to stable kernels, simply disallow the unsupported operations again to avoid this issue. Fixes: a314f6367787 ("mtd: spi-nor: Convert cadence-quadspi to use spi-mem framework") Signed-off-by: Matthias Schiffer Link: https://lore.kernel.org/r/20220406132832.199777-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

spi: spi-mtk-nor: initialize spi controller after resume

2022-04-27T12:38:52+00:00

[ Upstream commit 317c2045618cc1f8d38beb8c93a7bdb6ad8638c6 ] After system resumes, the registers of nor controller are initialized with default values. The nor controller will not function properly. To handle both issues above, we add mtk_nor_init() in mtk_nor_resume after pm_runtime_force_resume(). Fixes: 3bfd9103c7af ("spi: spi-mtk-nor: Add power management support") Signed-off-by: Allen-KH Cheng Reviewed-by: Rex-BC Chen Link: https://lore.kernel.org/r/20220412115743.22641-1-allen-kh.cheng@mediatek.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

Merge tag 'v5.15.35' into dev-5.15

2022-04-27T08:56:35+00:00

This is the 5.15.35 stable release Signed-off-by: Joel Stanley

spi: cadence-quadspi: fix protocol setup for non-1-1-X operations

2022-04-20T07:34:16+00:00

[ Upstream commit 97e4827d775faa9a32b5e1a97959c69dd77d17a3 ] cqspi_set_protocol() only set the data width, but ignored the command and address width (except for 8-8-8 DTR ops), leading to corruption of all transfers using 1-X-X or X-X-X ops. Fix by setting the other two widths as well. While we're at it, simplify the code a bit by replacing the CQSPI_INST_TYPE_* constants with ilog2(). Tested on a TI AM64x with a Macronix MX25U51245G QSPI flash with 1-4-4 read and write operations. Signed-off-by: Matthias Schiffer Link: https://lore.kernel.org/r/20220331110819.133392-1-matthias.schiffer@ew.tq-group.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

Merge tag 'v5.15.34' into dev-5.15

2022-04-14T08:19:30+00:00

This is the 5.15.34 stable release Signed-off-by: Joel Stanley

spi: core: add dma_map_dev for __spi_unmap_msg()

2022-04-13T18:59:23+00:00

commit 409543cec01a84610029d6440c480c3fdd7214fb upstream. Commit b470e10eb43f ("spi: core: add dma_map_dev for dma device") added dma_map_dev for _spi_map_msg() but missed to add for unmap routine, __spi_unmap_msg(), so add it now. Fixes: b470e10eb43f ("spi: core: add dma_map_dev for dma device") Cc: stable@vger.kernel.org # v5.14+ Signed-off-by: Vinod Koul Link: https://lore.kernel.org/r/20220406132238.1029249-1-vkoul@kernel.org Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman

spi: bcm-qspi: fix MSPI only access with bcm_qspi_exec_mem_op()

2022-04-13T18:59:19+00:00

[ Upstream commit 2c7d1b281286c46049cd22b43435cecba560edde ] This fixes case where MSPI controller is used to access spi-nor flash and BSPI block is not present. Fixes: 5f195ee7d830 ("spi: bcm-qspi: Implement the spi_mem interface") Signed-off-by: Kamal Dasu Acked-by: Florian Fainelli Link: https://lore.kernel.org/r/20220328142442.7553-1-kdasu.kdev@gmail.com Signed-off-by: Mark Brown Signed-off-by: Sasha Levin

spi: mediatek: support tick_delay without enhance_timing

2022-04-08T12:24:15+00:00

commit 03b1be379dcee2e9c866c2a455a1a4a9581b3efd upstream. this patch support tick_delay bit[31:30] without enhance_timing feature. Fixes: f84d866ab43f("spi: mediatek: add tick_delay support") Signed-off-by: Leilk Liu Reviewed-by: AngeloGioacchino Del Regno Link: https://lore.kernel.org/r/20220315032411.2826-2-leilk.liu@mediatek.com Signed-off-by: Mark Brown Signed-off-by: Greg Kroah-Hartman