<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/soc, branch dev-5.8-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.8-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.8-intel'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2021-02-04T13:16:07+00:00</updated>
<entry>
<title>soc: aspeed: mctp: Export function used to read BDF</title>
<updated>2021-02-04T13:16:07+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2021-01-28T21:31:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=706078bea2580f4af85d387de4d380d9c1432c57'/>
<id>urn:sha1:706078bea2580f4af85d387de4d380d9c1432c57</id>
<content type='text'>
Recently, aspeed-mctp driver functionality was extended to store BDF
values for already discovered MCTP endpoints on PCIe bus.
Let's expose kernel API to read BDF based on endpoint ID.

Change-Id: I146e67a8c2f4f541b4c3065c18dcadf531f30670
Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>Enable mailbox interrupts</title>
<updated>2021-02-04T01:29:36+00:00</updated>
<author>
<name>Yong Li</name>
<email>yong.b.li@linux.intel.com</email>
</author>
<published>2021-01-29T10:11:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5d84cfdc23ae7e4f5687228cd5de9c8f3f64a0b1'/>
<id>urn:sha1:5d84cfdc23ae7e4f5687228cd5de9c8f3f64a0b1</id>
<content type='text'>
Support interrupt generation for both 16 and 32 mailbox registers.

Tested:
After applied this patch, write the mailbox registers from BIOS side,
the misc manager can capture the new mailbox data.

Change-Id: I4030b6df176a53656aea9cb68ee80b67add8ed14
Signed-off-by: Yong Li &lt;yong.b.li@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>fixup! soc: aspeed: mctp: Add IOCTL to register default client</title>
<updated>2021-01-25T17:31:26+00:00</updated>
<author>
<name>Andrzej Kacprowski</name>
<email>andrzej.kacprowski@linux.intel.com</email>
</author>
<published>2020-12-08T08:13:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fa3944d5db0f9a815830eb0266e9a78aa9cfdd52'/>
<id>urn:sha1:fa3944d5db0f9a815830eb0266e9a78aa9cfdd52</id>
<content type='text'>
Remove temporary workaround to register first
user space client as default client.

Change-Id: I9e020be0815422c125f38713ce21a6ac3cdba1ad
Signed-off-by: Andrzej Kacprowski &lt;andrzej.kacprowski@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Move Aspeed eSPI driver to soc/aspeed tree</title>
<updated>2021-01-14T23:18:04+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-01-14T23:06:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7dc56f9f1e6271d217f65389808dd772717ba9d5'/>
<id>urn:sha1:7dc56f9f1e6271d217f65389808dd772717ba9d5</id>
<content type='text'>
This commit moves Aspeed eSPI driver from misc to soc/aspeed tree
to make correct probing order for LPC and eSPI driver. Since LPC
runs over eSPI, eSPI driver should be registered ahead of LPC
driver.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Change-Id: I6c813c3e29ddb02c86e3266b9fc713a8b410169e
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Register peci_mctp device</title>
<updated>2021-01-11T23:22:20+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2020-12-06T13:18:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3614f7ed2cd6dd73d043d663142611eb5e9fbc16'/>
<id>urn:sha1:3614f7ed2cd6dd73d043d663142611eb5e9fbc16</id>
<content type='text'>
Now that it is possible to send PECI frames via aspeed-mctp driver,
let's add aspeed-peci-mctp node to allow bind peci-mctp-aspeed adapter
driver.

Change-Id: Ie511af2896a6626d7179cd9475ec9ef8c7309496
Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Fix TX hangs and optimize TX logic</title>
<updated>2021-01-08T10:19:27+00:00</updated>
<author>
<name>Andrzej Kacprowski</name>
<email>andrzej.kacprowski@linux.intel.com</email>
</author>
<published>2020-12-30T12:25:34+00:00</published>
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<id>urn:sha1:64049d5d9f9f9d6da9b63f890d3369df82f85fc9</id>
<content type='text'>
Currently driver submits 1 (or rarely more than 1) packet then
waits until HW signals transmission completion before sending
more packets. This logic requires interrupt after each packet,
aspeed_mctp_tx_tasklet() is invoked twice per packet.

New logic uses TX ring correctly, packets are added to the end of
circular ring buffer. The driver does not have to wait for HW to
complete transmission of enqueued packets before adding more packets
to TX queue. Interrupt is generated only if TX ring if full.
This change significantly improves packet transmission performance:
PECI GetTemp command takes ~25us instead of ~30us.
This change also fixes sporadic TX hangs during host reboot seen
with current driver.

Change-Id: Ia12f71eb048c10e7aa0dd3821206044698d0c7f9
Signed-off-by: Andrzej Kacprowski &lt;andrzej.kacprowski@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Update source EID in TX packets</title>
<updated>2021-01-08T10:19:27+00:00</updated>
<author>
<name>Andrzej Kacprowski</name>
<email>andrzej.kacprowski@linux.intel.com</email>
</author>
<published>2020-12-28T12:03:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d0cd1f542c7f2f5348f25cae4dec8b42ca771c10'/>
<id>urn:sha1:d0cd1f542c7f2f5348f25cae4dec8b42ca771c10</id>
<content type='text'>
If self EID is known then the driver updates source EID in
MCTP header of sent packets. For MCTP control packets the
source EID is not updated as it may disrupt MCTP discovery flow.
Self EID is determined from list of known endpoints provided
by ASPEED_MCTP_IOCTL_SET_EID_INFO IOCTL.

Change-Id: I8d6d0aebac096859a55694d6d82540aea8264085
Signed-off-by: Andrzej Kacprowski &lt;andrzej.kacprowski@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>fixup! aspeed-mctp: Add EID information related ioctls</title>
<updated>2021-01-08T08:17:14+00:00</updated>
<author>
<name>Karol Wachowski</name>
<email>karol.wachowski@intel.com</email>
</author>
<published>2020-12-18T11:22:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f08c4b68288abc0b52f6f96d8179179e1c319b61'/>
<id>urn:sha1:f08c4b68288abc0b52f6f96d8179179e1c319b61</id>
<content type='text'>
Fix error when swapping two empty lists.
Copy count in ASPEED_MCTP_GET_EID_INFO to userbuf instead of
incorrectly returning it by value.

Change-Id: I8549a3a988d1f44106582729b9a6eca650ded256
Signed-off-by: Karol Wachowski &lt;karol.wachowski@intel.com&gt;
</content>
</entry>
<entry>
<title>fixup! soc: aspeed: mctp: Expose internal kernel API</title>
<updated>2021-01-07T01:18:44+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2021-01-06T17:42:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b1dcf75221f957715cae9698dab46d0c4ccbdb00'/>
<id>urn:sha1:b1dcf75221f957715cae9698dab46d0c4ccbdb00</id>
<content type='text'>
Fixed a missing error handling for case where
wait_event_interruptible_timeout() returns -ERESTARTSYS.
Renamed the exposed functions to be more consistent with their usage.
Added dedicated function to flush client rx queue.

Change-Id: I0fd1bfca926b34ae0f4dc18f07e453b3861a4c3e
Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>soc: aspeed: mctp: Fix RX hangs and RX packet misses</title>
<updated>2020-12-21T11:09:42+00:00</updated>
<author>
<name>Andrzej Kacprowski</name>
<email>andrzej.kacprowski@linux.intel.com</email>
</author>
<published>2020-12-08T13:42:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=61c9d709d68ed993bb2a38ea160f6da0299cc4e3'/>
<id>urn:sha1:61c9d709d68ed993bb2a38ea160f6da0299cc4e3</id>
<content type='text'>
Under even moderate traffic the driver can miss a lot of received
packets and eventually stops receiving packets at all.
There is an bug in AST2600 RX logic where HW does not wrap
around RX read buffer pointer correctly. Current driver
workaround for this bug resets RX HW read pointer to 0 whenever
it reaches end of the RX buffer ring - this does not work properly
if more than 1 packet is received while RX pointer is close to
the end of the RX buffer ring - in such case HW can detect ring
full condition and stop RX.

The new workaround has different logic: it sets HW buffer count to
4n - 1 and updates driver maintained RX write pointer so it
tracks HW read pointer to prevent hardware from stopping.
Received packets are located by looking into RX data buffers
rather that HW read pointer that contains incorrect value anyway.
Driver never resets HW read pointer, HW is receiving packets without
any interference form the driver.
Also handle RX_CMD_NO_MORE_INT - if RX ring if full then
HW will clear RX_CMD_READY bit and we need to re-enable it
once we free some space in RX ring.

Change-Id: I0a94fd43a91f17677e6df9da7bb71b3254543de0
Signed-off-by: Andrzej Kacprowski &lt;andrzej.kacprowski@linux.intel.com&gt;
</content>
</entry>
</feed>
