BMC/Intel-BMC/linux.git/drivers/rtc/rtc-rx8025.c, branch dev-4.3Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.32015-09-05T11:19:12+00:00rtc: rx8025: check time validity when necessary2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-04T09:33:59+00:00urn:sha1:efbbb4fd6b6fe0d3d2cfb3c5bbcdf00f1995cb60
Check time validity when reading time as this is when we need to know.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: fix RX8025_BIT_CTRL2_CTFG initialization2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-04T09:24:33+00:00urn:sha1:5c66e1e0b79bd63dcdfbc03b80823522643a1f14
RX8025_BIT_CTRL2_CTFG was set to 0 only when it was already 0.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: remove useless initialization2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-04T08:56:50+00:00urn:sha1:4b33d36b670e7166e8a082e050bfb241ba65271f
irq_freq is already initialized to 1 in rtc_device_register()
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: reset validity when setting time2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-04T08:48:20+00:00urn:sha1:8c4a4467cda299491eff64640c891a0b2926cb76
Wait for the user to set the time to reset the validity bits. Until then,
the time may be invalid.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: fix rx8025_init_client()2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-04T08:46:22+00:00urn:sha1:a27c7bf657cb4ab893328359b66a584251be6cac
rx8025_init_client is modifying ctrl[0] and writing it to RX8025_REG_CTRL2
but ctrl[0] is actually RX8025_REG_CTRL1.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: continue without alarm when irq request fails2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-03T22:45:37+00:00urn:sha1:8a06513df55ef10baf80f55d13786eb29efa4fa6
Instead of bailing out, disable alarms and continue when
devm_request_threaded_irq() fails. This allows to still provide some
functionality.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: cleanup accessors2015-09-05T11:19:12+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-08-03T22:40:25+00:00urn:sha1:fd9061fb497926c0e62bf1c7ff727801499fd2ea
Remove useless error messages, at that point, the user already knows
something went wrong but will not be able to do anything about it anyway.
It is also highly unlikely that some registers are readable/writable
but not some other ones.
Also, transform rx8025_read_reg to be more resemblant to
i2c_smbus_read_byte_data()
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: don't reset the time2015-09-05T11:19:11+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-07-26T08:13:31+00:00urn:sha1:6f0a8cfebb898b88fb0d934d7a44a6d4c98d5285
Stop setting the time to epoch when it is invalid. The proper way to handle
that is to return an error when it is invalid instead of returning an
incorrect value.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: fix transfer mode2015-09-05T11:19:11+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-07-25T13:54:59+00:00urn:sha1:2e10e74df72ff0f8ea65eb1ee6e39ed8278a91bf
The datasheet specifies that transfer mode must be 0 for write and either
0x4 (simplified read) or 0 (standard read). 0x8 is not specified, use
standard mode.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
rtc: rx8025: only handle dates between 2000 and 20992015-09-05T11:19:11+00:00Alexandre Bellonialexandre.belloni@free-electrons.com2015-07-25T10:07:37+00:00urn:sha1:32672c55951b2633bb93ec6f12734cf17e9d3a14
The hardware is only capable of handling dates between 2000 and 2099,
enforce that.
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>