<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/reset, branch dev-5.1</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.1</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.1'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-07-02T05:03:44+00:00</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152</title>
<updated>2019-07-02T05:03:44+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-27T06:55:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d5eae63c6411e73f1760595c66f9b78d7d4d23a9'/>
<id>urn:sha1:d5eae63c6411e73f1760595c66f9b78d7d4d23a9</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license as published by
  the free software foundation either version 2 of the license or at
  your option any later version

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-or-later

has been chosen to replace the boilerplate/reference in 3029 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190527070032.746973796@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
(cherry picked from commit 2874c5fd284268364ece81a7bd936f3c8168e567)
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>reset: meson-audio-arb: Fix missing .owner setting of reset_controller_dev</title>
<updated>2019-03-25T15:22:10+00:00</updated>
<author>
<name>Axel Lin</name>
<email>axel.lin@ingics.com</email>
</author>
<published>2019-03-18T14:03:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=13e8a05b922457761ddef39cfff6231bd4ed9eef'/>
<id>urn:sha1:13e8a05b922457761ddef39cfff6231bd4ed9eef</id>
<content type='text'>
Set .owner to prevent module unloading while being used.

Signed-off-by: Axel Lin &lt;axel.lin@ingics.com&gt;
Fixes: d903779b58be ("reset: meson: add meson audio arb driver")
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux into arm/drivers</title>
<updated>2019-02-15T16:21:32+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T16:21:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6f2185f8e345c9023bdd030d7dae4affd6bea539'/>
<id>urn:sha1:6f2185f8e345c9023bdd030d7dae4affd6bea539</id>
<content type='text'>
Reset controller changes for v5.1

This adds the include/linux/reset directory to MAINTAINERS for reset
specific headers and adds headers for sunxi and socfpga in there to
get rid of a few extern function declarations.
There is a new reset driver for the Broadcom STB reset controller and
the i.MX7 system reset controller driver is extended to support i.MX8MQ
as well. Finally, there is a new header with reset id constants for
the Meson G12A SoC, which has a reset controller identical to Meson AXG
and thus can reuse its driver and DT bindings.

* tag 'reset-for-5.1' of git://git.pengutronix.de/git/pza/linux:
  dt-bindings: reset: meson: add g12a bindings
  reset: imx7: Add support for i.MX8MQ IP block variant
  reset: imx7: Add plubming to support multiple IP variants
  reset: Add Broadcom STB SW_INIT reset controller driver
  dt-bindings: reset: Add document for Broadcom STB reset controller
  reset: socfpga: declare socfpga_reset_init in a header file
  reset: sunxi: declare sun6i_reset_init in a header file
  MAINTAINERS: use include/linux/reset for reset controller related headers
  dt-bindings: reset: imx7: Document usage on i.MX8MQ SoCs

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>Merge tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx into arm/drivers</title>
<updated>2019-02-15T16:16:45+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2019-02-15T16:16:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=59f527dd7a6191734f7c2049f045cbcac290efa8'/>
<id>urn:sha1:59f527dd7a6191734f7c2049f045cbcac290efa8</id>
<content type='text'>
arm64: zynqmp: SoC changes for v5.1

- Extend firmware interface with reset, nvmem,
  power management and power domain support

- Add reset, nvmem driver, power management and
  power domain drivers
-

* tag 'zynqmp-soc-for-v5.1' of https://github.com/Xilinx/linux-xlnx:
  drivers: soc: xilinx: Add ZynqMP power domain driver
  firmware: xilinx: Add APIs to control node status/power
  dt-bindings: power: Add ZynqMP power domain bindings
  drivers: soc: xilinx: Add ZynqMP PM driver
  firmware: xilinx: Implement ZynqMP power management APIs
  dt-bindings: soc: Add ZynqMP PM bindings
  nvmem: zynqmp: Added zynqmp nvmem firmware driver
  dt-bindings: nvmem: Add bindings for ZynqMP nvmem driver
  firmware: xilinx: Add zynqmp_pm_get_chipid() API
  reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.
  dt-bindings: reset: Add bindings for ZynqMP reset driver
  firmware: xilinx: Add reset API's

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>reset: reset-zynqmp: Adding support for Xilinx zynqmp reset controller.</title>
<updated>2019-01-29T13:08:40+00:00</updated>
<author>
<name>Nava kishore Manne</name>
<email>nava.manne@xilinx.com</email>
</author>
<published>2019-01-25T07:46:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=62f0d7dc3bae9f7ce2701d6c8cfd3d93130017af'/>
<id>urn:sha1:62f0d7dc3bae9f7ce2701d6c8cfd3d93130017af</id>
<content type='text'>
Add a reset controller driver for Xilinx Zynq UltraScale+ MPSoC.
The zynqmp reset-controller has the ability to reset lines
connected to different blocks and peripheral in the Soc.

Signed-off-by: Nava kishore Manne &lt;nava.manne@xilinx.com&gt;
Acked-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>reset: imx7: Add support for i.MX8MQ IP block variant</title>
<updated>2019-01-28T10:16:04+00:00</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-01-22T02:10:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c979dbf59987f4114fdbd491c8ad254343a430fd'/>
<id>urn:sha1:c979dbf59987f4114fdbd491c8ad254343a430fd</id>
<content type='text'>
Add bits and pieces needed to support IP block variant found on
i.MX8MQ SoCs.

Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Cc: "A.s. Dong" &lt;aisheng.dong@nxp.com&gt;
Cc: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
[p.zabel@pengutronix.de: fixed whitespace alignment]
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: imx7: Add plubming to support multiple IP variants</title>
<updated>2019-01-28T10:16:04+00:00</updated>
<author>
<name>Andrey Smirnov</name>
<email>andrew.smirnov@gmail.com</email>
</author>
<published>2019-01-22T02:10:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1059035853ae4d65b138acdb1cd15d963e6aa776'/>
<id>urn:sha1:1059035853ae4d65b138acdb1cd15d963e6aa776</id>
<content type='text'>
In order to enable supporting i.MX8MQ with this driver, convert it to
expect variant specific bits to be passed via driver data.

Cc: p.zabel@pengutronix.de
Cc: Fabio Estevam &lt;fabio.estevam@nxp.com&gt;
Cc: cphealy@gmail.com
Cc: l.stach@pengutronix.de
Cc: Leonard Crestez &lt;leonard.crestez@nxp.com&gt;
Cc: "A.s. Dong" &lt;aisheng.dong@nxp.com&gt;
Cc: Richard Zhu &lt;hongxing.zhu@nxp.com&gt;
Cc: Rob Herring &lt;robh@kernel.org&gt;
Cc: devicetree@vger.kernel.org
Cc: linux-imx@nxp.com
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Andrey Smirnov &lt;andrew.smirnov@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: Add Broadcom STB SW_INIT reset controller driver</title>
<updated>2019-01-28T10:16:04+00:00</updated>
<author>
<name>Florian Fainelli</name>
<email>f.fainelli@gmail.com</email>
</author>
<published>2019-01-23T22:54:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=77750bc089e4508ff62f036e6e6626cf8d7384cb'/>
<id>urn:sha1:77750bc089e4508ff62f036e6e6626cf8d7384cb</id>
<content type='text'>
Add support for resetting blocks through the Linux reset controller
subsystem when reset lines are provided through a SW_INIT-style reset
controller on Broadcom STB SoCs.

Signed-off-by: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
<entry>
<title>reset: socfpga: declare socfpga_reset_init in a header file</title>
<updated>2019-01-28T10:16:04+00:00</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2018-12-13T11:24:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cdbeb315ed8dcc142a68054899cedd6e4f1fea3f'/>
<id>urn:sha1:cdbeb315ed8dcc142a68054899cedd6e4f1fea3f</id>
<content type='text'>
Avoid declaring extern functions in c files. To make sure function
definition and usage don't get out of sync, declare socfpga_reset_init
in a common header.

Suggested-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Acked-by: Dinh Nguyen &lt;dinguyen@kernel.org&gt;
</content>
</entry>
<entry>
<title>reset: sunxi: declare sun6i_reset_init in a header file</title>
<updated>2019-01-28T10:16:04+00:00</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2018-12-13T11:22:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fdce60787f6215607dc7ac910cbaf4416684b589'/>
<id>urn:sha1:fdce60787f6215607dc7ac910cbaf4416684b589</id>
<content type='text'>
Avoid declaring extern functions in c files. To make sure function
definition and usage don't get out of sync, declare sun6i_reset_init
in a common header.

Suggested-by: Stephen Rothwell &lt;sfr@canb.auug.org.au&gt;
Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
</content>
</entry>
</feed>
