BMC/Intel-BMC/linux.git/drivers/reset/reset-uniphier.c, branch dev-5.1Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.12018-07-19T09:19:47+00:00reset: uniphier: add reset control support for SPI2018-07-19T09:19:47+00:00Kunihiko Hayashihayashi.kunihiko@socionext.com2018-07-19T06:18:53+00:00urn:sha1:6b39fd590aebca1a6a4c827f29f14d2b6df3939d
Add reset control for SPI controller on UniPhier SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add LD11/LD20 stream demux system reset control2018-04-27T09:59:05+00:00Katsuhiro Suzukisuzuki.katsuhiro@socionext.com2018-04-27T00:41:21+00:00urn:sha1:d7bab65b1f57cdf2d81fc469cea6b2160a50e917
Add reset lines for MPEG2 transport stream I/O and demux system (HSC)
on UniPhier LD11/LD20 SoCs.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add SATA reset control support and change SATA-PHY ID2018-04-27T09:55:59+00:00Kunihiko Hayashihayashi.kunihiko@socionext.com2018-03-30T09:44:44+00:00urn:sha1:786367176d61cacaeaad90a2690c0637971323ea
Add reset lines for SATA controller on UniPhier SoCs.
This adds support for Pro4 and PXs3 in addition to PXs2.
And this changes the ID of the reset line for SATA-PHY on PXs2.
Since some SoCs have two controller instances with a common PHY, this moves
the ID of SATA-PHY for consistency.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add PCIe reset control support2018-04-27T09:55:59+00:00Kunihiko Hayashihayashi.kunihiko@socionext.com2018-03-30T09:44:43+00:00urn:sha1:fdc0f235d19492e64914ee60bb93a34d063a319b
Add reset lines for PCIe controller on UniPhier SoCs. This adds support for
Pro5, LD20 and PXs3.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: fix USB clock line for LD202018-04-27T09:51:12+00:00Masahiro Yamadayamada.masahiro@socionext.com2018-04-12T02:16:10+00:00urn:sha1:e6914365fd280fce303a89b8a8d4529af5a2e0f9
For LD20, the bit 5 of the offset 0x200c turned out to be a USB3
reset. The hardware document says it is the GIO reset despite LD20
has no GIO bus, confusingly.
Also, fix confusing comments for PXs3.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add ethernet reset control support for PXs32018-03-27T08:44:04+00:00Kunihiko Hayashihayashi.kunihiko@socionext.com2018-03-23T05:12:34+00:00urn:sha1:5573fe85c7e6f94613a357bfcbcec2b57492a8ed
Add reset lines for ethernet controller on PXs3 SoC.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add Pro4/Pro5/PXs2 audio systems reset control2018-03-27T08:44:03+00:00Katsuhiro Suzukisuzuki.katsuhiro@socionext.com2018-03-08T08:09:29+00:00urn:sha1:b06b631c8b67aafd57cfbc0313bdfec0db62cacb
Add reset lines for audio subsystem (AIO) on UniPhier
Pro4/Pro5/PXs2 SoCs.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add PXs3 reset data2017-10-05T08:24:14+00:00Masahiro Yamadayamada.masahiro@socionext.com2017-10-05T02:30:57+00:00urn:sha1:2a158f888853cb11140532be79883c8faf31c83d
Add basic reset data for Socionext's new SoC PXs3.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add ethernet reset control support2017-10-04T08:36:02+00:00Kunihiko Hayashihayashi.kunihiko@socionext.com2017-08-28T09:59:38+00:00urn:sha1:4c05c4a5ee64616583f836938ccf48dc01dd52cf
Add reset lines for ethernet controller on Pro4, PXs2, LD11 and
LD20 SoCs.
Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: uniphier: add analog amplifiers reset control2017-08-14T07:29:47+00:00Katsuhiro Suzukisuzuki.katsuhiro@socionext.com2017-08-13T09:00:43+00:00urn:sha1:ac0c735ac3dd6697055299cac01617527aa6a695
Add a reset line for analog signal amplifier core (ADAMV) on
UniPhier LD11/LD20 SoCs.
Signed-off-by: Katsuhiro Suzuki <suzuki.katsuhiro@socionext.com>
Acked-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>