BMC/Intel-BMC/linux.git/drivers/reset/reset-ath79.c, branch dev-4.6Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.62016-02-10T09:53:34+00:00reset: ath79: Make reset_control_ops const2016-02-10T09:53:34+00:00Philipp Zabelp.zabel@pengutronix.de2016-01-17T14:12:23+00:00urn:sha1:d2f79f223f931dfadf98c42a9d426999d5e3397c
The ath79_reset_ops structure is never modified. Make it const.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Acked-by: Alban Bedel <albeu@free.fr>
reset: ath79: Add system restart support2015-11-25T09:49:58+00:00Alban Bedelalbeu@free.fr2015-11-24T00:00:33+00:00urn:sha1:ba64e27e9d3c558549f765869c6a471114c0f328
Add a system restart handler that use the FULL_CHIP_RESET bit of the
reset controller.
Signed-off-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: ath79: Fix missing spin_lock_init2015-09-01T12:48:40+00:00Axel Linaxel.lin@ingics.com2015-09-01T12:15:10+00:00urn:sha1:f319cb8491e1b4cc44e7baeeb3ae7817dedf57fc
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Alban Bedel <albeu@free.fr>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
reset: Add a driver for the reset controller on the AR71XX/AR9XXX2015-08-04T08:41:30+00:00Alban Bedelalbeu@free.fr2015-08-03T17:23:52+00:00urn:sha1:ff591a91225d3621a503bb18faa0f0d747a06e50
The AR71XX/AR9XXX SoC have a simple reset controller with one bit per
reset line.
Signed-off-by: Alban Bedel <albeu@free.fr>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>