Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2 2019-05-21T08:50:46+00:00 2019-05-21T08:50:46+00:00 Thomas Gleixner tglx@linutronix.de 2019-05-19T12:07:45+00:00 urn:sha1:ec8f24b7faaf3d4799a7c3f4c1b87f6b02778ad1 Add SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any form These files fall under the project license, GPL v2 only. The resulting SPDX license identifier is: GPL-2.0-only Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> 2019-05-09T15:01:48+00:00 Anson Huang anson.huang@nxp.com 2019-05-09T13:29:29+00:00 urn:sha1:738a1cfec2edb4a6c53ac34fcb29447227dd135e i.MX7ULP has TPM(Low Power Timer/Pulse Width Modulation Module) inside, it can support multiple PWM channels, all the channels share same counter and period setting, but each channel can configure its duty and polarity independently. There are several TPM modules in i.MX7ULP, the number of channels in TPM modules are different, it can be read from each TPM module's PARAM register. Signed-off-by: Anson Huang <Anson.Huang@nxp.com> Reviewed-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2019-03-20T11:33:51+00:00 Vignesh Raghavendra vigneshr@ti.com 2019-03-12T09:16:29+00:00 urn:sha1:efc80fb3746609aa6beed8bc33751f29ee18fed7 K3 devices have the same EHRPWM IP as OMAP SoCs. Enable the driver to be built for K3 devices. Also, drop reference to AM33xx in help text, as IP is found on multiple TI SoCs. Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2019-01-16T07:45:33+00:00 Uwe Kleine-König u.kleine-koenig@pengutronix.de 2019-01-07T19:53:52+00:00 urn:sha1:d80f8206905c1a8c3857d90f12bbfd6293b48a4b The two PWM implementations called v1 (for i.MX1 and i.MX21) and v2 (for i.MX27 and later) have nothing in common apart from needing two clocks named "per" and "ipg" and being integrated in a SoC named i.MX. So split the file containing the two disjunct drivers into two files and two complete separate drivers. Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> [thierry.reding@gmail.com: fix a modular build issue] Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2018-12-24T11:06:47+00:00 Clément Péron peron.clem@gmail.com 2018-11-23T09:35:59+00:00 urn:sha1:88a053d2923479658e82621c4c642dc8a494392d The Cygnus architecture uses a Kona PWM. This is already present in the device tree but can't be built actually. Hence, allow the Kona PWM to be built for the Cygnus architecture. Signed-off-by: Clément Péron <peron.clem@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Reviewed-by: Scott Branden <scott.branden@broadcom.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2018-10-16T11:14:52+00:00 Vignesh R vigneshr@ti.com 2018-10-16T06:04:02+00:00 urn:sha1:6f37709fb0a61f09ca96348044c5bb13e333e518 K3 devices have the same ECAP IP as OMAP SoCs. Enable driver to be built for K3 devices. Also, drop reference to AM33xx in help text, as IP is found on multiple TI SoCs. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2018-08-20T09:36:07+00:00 John Crispin john@phrozen.org 2018-07-25T09:52:09+00:00 urn:sha1:8cdc43afbb2cb58692c49fab0b13e2d9439c0642 Add support for MT7628. The SoC is legacy MIPS and hence has no complex clock tree. This patch add an extra flag to the SoC specific data indicating, that no clocks are present. Signed-off-by: John Crispin <john@phrozen.org> Reviewed-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2018-06-06T08:04:00+00:00 Arnd Bergmann arnd@arndb.de 2018-05-25T16:04:54+00:00 urn:sha1:d968e5041fefbc7c4d545cabbc692b11cc49050d When compile-testing the PWM driver without also enabling the stm32_timers MFD, we run into a link error: drivers/pwm/pwm-stm32.o: In function `stm32_pwm_raw_capture.isra.6': pwm-stm32.c:(.text+0xcb0): undefined reference to `stm32_timers_dma_burst_read' We don't need the '|| COMPILE_TEST' here, since stm32_timers itself can be built with CONFIG_COMPILE_TEST on all architectures, so we do get the coverage through allmodconfig and randconfig builds even when we make it a hard dependency. Fixes: 7edf7369205b ("pwm: Add driver for STM32 plaftorm") Signed-off-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com> 2018-04-13T22:46:21+00:00 Linus Torvalds torvalds@linux-foundation.org 2018-04-13T22:46:21+00:00 urn:sha1:daf3ef6e965d1d51d6ec604a8fc9919b75d5ec3c Pull pwm updates from Thierry Reding: "This set of changes adds support for more generations of the RCar controller as well as runtime PM support. The JZ4740 driver gains support for device tree and can now be used on all Ingenic SoCs. Rounding things off is a random assortment of fixes and cleanups all across the board" * tag 'pwm/for-4.17-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/thierry.reding/linux-pwm: (29 commits) pwm: rcar: Add suspend/resume support pwm: rcar: Use PM Runtime to control module clock dt-bindings: pwm: rcar: Add bindings for R-Car M3N support pwm: rcar: Fix a condition to prevent mismatch value setting to duty pwm: sysfs: Use put_device() instead of kfree() dt-bindings: pwm: sunxi: Add new compatible strings pwm: sun4i: Simplify controller mapping pwm: sun4i: Drop unused .has_rdy member pwm: sun4i: Properly check current state pwm: Remove depends on AVR32 pwm: stm32: LPTimer: Use 3 cells ->of_xlate() dt-bindings: pwm-stm32-lp: Add #pwm-cells pwm: stm32: Protect common prescaler for all channels pwm: stm32: Remove unused struct device pwm: mediatek: Improve precision in rate calculation pwm: mediatek: Remove redundant MODULE_ALIAS entries pwm: mediatek: Fix up PWM4 and PWM5 malfunction on MT7623 pwm: jz4740: Enable for all Ingenic SoCs pwm: jz4740: Add support for devicetree pwm: jz4740: Implement ->set_polarity() ... 2018-03-27T22:57:05+00:00 Corentin Labbe clabbe.montjoie@gmail.com 2018-01-18T19:58:14+00:00 urn:sha1:120cc2fff40096fb99d96d8671ad7469dd44862f AVR32 is gone, so no more need to depend on it. Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>