<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/sh-pfc, branch dev-5.7</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.7</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.7'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2020-02-21T12:57:44+00:00</updated>
<entry>
<title>pinctrl: sh-pfc: Remove use of ARCH_R8A7795</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-02-18T11:25:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ffe9f9b0515600fc5ccf121315939c2ab2cd1486'/>
<id>urn:sha1:ffe9f9b0515600fc5ccf121315939c2ab2cd1486</id>
<content type='text'>
CONFIG_ARCH_R8A7795 was split in CONFIG_ARCH_R8A77950 and
CONFIG_ARCH_R8A77951 in commit b925adfceb529389 ("soc: renesas: Add
ARCH_R8A7795[01] for existing R-Car H3"), so its users can be removed.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Link: https://lore.kernel.org/r/20200218112557.5924-1-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: gpio: Return early in gpio_pin_to_irq()</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-02-12T09:02:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6793baa31d684f2cace0e2ee4af4bdbc993dbed8'/>
<id>urn:sha1:6793baa31d684f2cace0e2ee4af4bdbc993dbed8</id>
<content type='text'>
As of commit 4adeabd042422cee ("pinctrl: sh-pfc: Remove hardcoded IRQ
numbers"), only a single operation needs to be performed after finding
the wanted pin.  Hence decrease the needed attention span of the casual
reader by replacing the goto by a direct return.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200212090200.11106-1-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Add function GPIO checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=92c44680c5c6f1342288f6626da4008d416d8e40'/>
<id>urn:sha1:92c44680c5c6f1342288f6626da4008d416d8e40</id>
<content type='text'>
Add checks for legacy function GPIO descriptors:
  1. Function GPIOs must have a name,
  2. Names must be unique,
  3. Enum ID values must be unique.

This exposes bugs like those fixed in
  - commit 884caadad128efad ("pinctrl: sh-pfc: sh7734: Fix duplicate
    TCLK1_B"),
  - commit 55b1cb1f03ad5eea ("pinctrl: sh-pfc: sh7264: Fix CAN function
    GPIOs"),
  - commit 02aeb2f21530c98f ("pinctrl: sh-pfc: sh7269: Fix CAN function
    GPIOs"),
  - commit db9c07272c8245a2 ("sh: sh7264: Remove bogus SSU GPIO function
    definitions"),
  - commit b4fba344a2930769 ("sh: sh7269: Remove bogus SSU GPIO function
    definitions").

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-14-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Add data register checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0e6cd847a420e21f6e0d476c355127a7cbcb4a5d'/>
<id>urn:sha1:0e6cd847a420e21f6e0d476c355127a7cbcb4a5d</id>
<content type='text'>
Add checks for data register descriptors:
  1. Register addresses must be unique.
  2. Enum ID values must be unique.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-13-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Add ioctrl register checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4bd7d16a309e034ec92b13840bae5668918ddd5b'/>
<id>urn:sha1:4bd7d16a309e034ec92b13840bae5668918ddd5b</id>
<content type='text'>
Add checks for generic control register descriptors:
  1. Register addresses must be unique.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-12-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Add bias register checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8990cd297f1508904d3773f6a2c5af531e8649ca'/>
<id>urn:sha1:8990cd297f1508904d3773f6a2c5af531e8649ca</id>
<content type='text'>
Add checks for bias register descriptors:
  1. Pull-up and optional pull-down register addresses must be unique,
  2. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-11-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Add drive strength register checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=08df16e07ad0a1ec0ccf9a154014cb80e82c773e'/>
<id>urn:sha1:08df16e07ad0a1ec0ccf9a154014cb80e82c773e</id>
<content type='text'>
Add checks for drive strength register descriptors:
  1. Register addresses must be unique,
  2. Register fields must be non-overlapping,
  3. Referred pins must exist.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-10-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Improve pin group checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=40c8e4aad4e1575e101576aab1313f99ed3df49d'/>
<id>urn:sha1:40c8e4aad4e1575e101576aab1313f99ed3df49d</id>
<content type='text'>
Improve the checks for pin group descriptors:
  1. Introduce a local variable for the current group, to make the
     checks easier to read,
  2. Pin group names must be unique.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-9-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Improve pin function checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a95b077db4fcf5aeeaf74372e31d684df29cb033'/>
<id>urn:sha1:a95b077db4fcf5aeeaf74372e31d684df29cb033</id>
<content type='text'>
Improve the checks for pin function descriptors:
  1. Merge declaration and assignment of the local variable for the
     current pin function,
  2. Pin function names must be unique.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-8-geert+renesas@glider.be
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: checker: Improve pin checks</title>
<updated>2020-02-21T12:57:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2020-01-10T13:19:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4ef30dc72d0a3b3087078379b8e6d666a3c24270'/>
<id>urn:sha1:4ef30dc72d0a3b3087078379b8e6d666a3c24270</id>
<content type='text'>
Improve the checks for pin descriptors:
  1. Introduce local variables for the current pin, to make the checks
     easier to read,
  2. Pins must have a name,
  3. Fix double printing of identical pin names.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Niklas Söderlund &lt;niklas.soderlund+renesas@ragnatech.se&gt;
Link: https://lore.kernel.org/r/20200110131927.1029-7-geert+renesas@glider.be
</content>
</entry>
</feed>
