<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/sh-pfc, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-06-01T16:29:58+00:00</updated>
<entry>
<title>treewide: fix typos of SPDX-License-Identifier</title>
<updated>2019-06-01T16:29:58+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2019-06-01T03:22:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8e82fe2ab65a80b1526b285c661ab88cc5891e3a'/>
<id>urn:sha1:8e82fe2ab65a80b1526b285c661ab88cc5891e3a</id>
<content type='text'>
Prior to the adoption of SPDX, it was difficult for tools to determine
the correct license due to incomplete or badly formatted license text.
The SPDX solves this issue, assuming people can correctly spell
"SPDX-License-Identifier" although this assumption is broken in some
places.

Since scripts/spdxcheck.py parses only lines that exactly matches to
the correct tag, it cannot (should not) detect this kind of error.

If the correct tag is missing, scripts/checkpatch.pl warns like this:

 WARNING: Missing or malformed SPDX-License-Identifier tag in line *

So, people should notice it before the patch submission, but in reality
broken tags sometimes slip in. The checkpatch warning is not useful for
checking the committed files globally since large number of files still
have no SPDX tag.

Also, I am not sure about the legal effect when the SPDX tag is broken.

Anyway, these typos are absolutely worth fixing. It is pretty easy to
find suspicious lines by grep.

  $ git grep --not -e SPDX-License-Identifier --and -e SPDX- -- \
    :^LICENSES :^scripts/spdxcheck.py :^*/license-rules.rst
  arch/arm/kernel/bugs.c:// SPDX-Identifier: GPL-2.0
  drivers/phy/st/phy-stm32-usbphyc.c:// SPDX-Licence-Identifier: GPL-2.0
  drivers/pinctrl/sh-pfc/pfc-r8a77980.c:// SPDX-Lincense-Identifier: GPL 2.0
  lib/test_stackinit.c:// SPDX-Licenses: GPLv2
  sound/soc/codecs/max9759.c:// SPDX-Licence-Identifier: GPL-2.0

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a77965: Add I2C{0,3,5} pins, groups and functions</title>
<updated>2019-04-04T10:02:50+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2019-04-03T14:45:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0a042b355e60269ad30725b5b5ca68fc5371a8df'/>
<id>urn:sha1:0a042b355e60269ad30725b5b5ca68fc5371a8df</id>
<content type='text'>
This patch adds I2C{0,3,5} pins, groups and functions to the R8A7796 SoC.

These pins are physically muxed with other pins. Therefore, setup of
MOD_SEL is needed for exclusive control with other pins.

[takeshi.kihara.df: add blank lines after function declarations]
Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[uli: use standard macros PINMUX_IPSR_PHYS and PINMUX_IPSR_PHYS_MSEL]
Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7796: Remove placeholder I2C pin data</title>
<updated>2019-04-04T10:02:07+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>uli+renesas@fpond.eu</email>
</author>
<published>2019-04-03T14:45:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f05603fa6aa30430f444620344a2f75adeeddbd2'/>
<id>urn:sha1:f05603fa6aa30430f444620344a2f75adeeddbd2</id>
<content type='text'>
Pin data for I2C controllers 0, 3 and 5 is properly defined already.

Signed-off-by: Ulrich Hecht &lt;uli+renesas@fpond.eu&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a77970: Fix spacing</title>
<updated>2019-04-04T10:01:18+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2019-03-29T15:30:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=baaa2effc684e491d144c5d98901e39e644a6701'/>
<id>urn:sha1:baaa2effc684e491d144c5d98901e39e644a6701</id>
<content type='text'>
Replace "F_(0,0)" by "F_(0, 0)".

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: rcar-gen3: Rename SEL_NDFC to SEL_NDF</title>
<updated>2019-04-02T08:02:58+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2019-03-08T12:55:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e551122cdb7fcb9a0fef3c22cf3dfbb34626bafc'/>
<id>urn:sha1:e551122cdb7fcb9a0fef3c22cf3dfbb34626bafc</id>
<content type='text'>
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of Feb
12, 2019, the sel_ndfc MOD_SEL register bit is renamed to sel_ndf.

Update the pin control drivers to reflect this.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[geert: Update R-Car E3]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: rcar-gen3: Rename SEL_ADG_{A,B,C} to SEL_ADG{A,B,C}</title>
<updated>2019-04-02T08:02:49+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2018-09-28T08:32:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a040f3dec8eb7b11c2fd28762bd4f838da4d166b'/>
<id>urn:sha1:a040f3dec8eb7b11c2fd28762bd4f838da4d166b</id>
<content type='text'>
According to the R-Car Gen3 Hardware Manual Errata for Rev 0.80 of Dec
22, 2017, and the Errata for Rev 1.50 of Dec 25, 2018, MOD_SEL0 register
bits 3, 4, 17, and 18 are renamed from SEL_ADG_{A,B,C} to
SEL_ADG{A,B,C}.  Update the pin control drivers to reflect this.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: rcar-gen3: Rename RTS{0,1,3,4}# pin function definitions</title>
<updated>2019-04-02T08:02:40+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2019-03-08T13:42:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=624a7a12cc0cc776c9c82347ffe5ddce7218eeca'/>
<id>urn:sha1:624a7a12cc0cc776c9c82347ffe5ddce7218eeca</id>
<content type='text'>
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.50 of
Feb 12, 2019, the RTS{0,1,3,4}_#/TANS pin names defined in the GPSR and
IPSR registers are renamed to RTS{0,1,3,4}_#.
This patch updates the pin control drivers to reflect this.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[geert: Update R-Car H3 ES1.x, V3M, V3H, and D3]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: rcar-gen3: Remove CC5_OSCOUT pin</title>
<updated>2019-04-02T08:02:22+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2018-09-28T09:09:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=662dc924a05e9dffd62f602c7111d6b7ada8fa88'/>
<id>urn:sha1:662dc924a05e9dffd62f602c7111d6b7ada8fa88</id>
<content type='text'>
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of
Jun 4, 2018, the CC5_OSCOUT pin is removed.  Update the pin control
drivers to reflect this.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[geert: Update R-Car V3M, V3H]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: rcar-gen3: Remove HDMI CEC pins, groups, and functions</title>
<updated>2019-04-02T08:01:51+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2018-09-28T08:38:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5671f8e0270ad5e33e3088e5f0fa71af67129630'/>
<id>urn:sha1:5671f8e0270ad5e33e3088e5f0fa71af67129630</id>
<content type='text'>
The HDMI CEC function is not supported by the R-Car Gen3 Hardware Manual
Rev 1.00. Therefore, delete the corresponding pin groups and functions,
and rename the HDMI[01]_CEC definitions to match their GPIO
functionality.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[geert: Squashed several commits]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a77990: Fix MOD_SEL1 bit30 when using SSI_SCK2 and SSI_WS2</title>
<updated>2019-04-02T08:01:36+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2018-12-06T07:42:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e87882eb9be10b2b9e28156922c2a47d877f5db4'/>
<id>urn:sha1:e87882eb9be10b2b9e28156922c2a47d877f5db4</id>
<content type='text'>
According to the R-Car Gen3 Hardware Manual Errata for Rev 1.00 of Aug
24, 2018, there is no need to configure MOD_SEL1 bit30 when the
SSI_SCK2_{A,B} or SSI_WS2_{A,B} pin functions are selected.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[geert: Remove now unused definitions, mark MOD_SEL1 bit30 reserved]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
</content>
</entry>
</feed>
