<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/sh-pfc, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
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<updated>2016-03-30T08:57:51+00:00</updated>
<entry>
<title>pinctrl: sh-pfc: only use dummy states for non-DT platforms</title>
<updated>2016-03-30T08:57:51+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2016-03-07T18:40:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0129801be4b87226bf502f18f5a9eabd356d1058'/>
<id>urn:sha1:0129801be4b87226bf502f18f5a9eabd356d1058</id>
<content type='text'>
If pinctrl_provide_dummies() is used unconditionally, then the dummy
state will be used even on DT platforms when the "init" state was
intentionally left out. Instead of "default", the dummy "init" state
will then be used during probe. Thus, when probing an I2C controller on
cold boot, communication triggered by bus notifiers broke because the
pins were not initialized.

Do it like OMAP2: use the dummy state only for non-DT platforms.

Cc: stable@vger.kernel.org
Fixes: ef0eebc05130 ("drivers/pinctrl: Add the concept of an "init" state")
Reported-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Acked-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: core: don't open code of_device_get_match_data()</title>
<updated>2016-03-09T03:46:50+00:00</updated>
<author>
<name>Wolfram Sang</name>
<email>wsa+renesas@sang-engineering.com</email>
</author>
<published>2016-03-01T16:38:46+00:00</published>
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<id>urn:sha1:331207af11964954f51ec44689b93977ac0c6843</id>
<content type='text'>
This change will also make Coverity happy by avoiding a theoretical NULL
pointer dereference; yet another reason is to use the above helper function
to tighten the code and make it more readable.

Signed-off-by: Wolfram Sang &lt;wsa+renesas@sang-engineering.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: make explicitly non-modular</title>
<updated>2016-03-09T03:23:19+00:00</updated>
<author>
<name>Paul Gortmaker</name>
<email>paul.gortmaker@windriver.com</email>
</author>
<published>2016-02-29T20:48:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a43647b6d8f43b1dab717a90c2b8fe2b34129b41'/>
<id>urn:sha1:a43647b6d8f43b1dab717a90c2b8fe2b34129b41</id>
<content type='text'>
The Kconfig / Makefile currently controlling compilation of this code is:

drivers/pinctrl/sh-pfc/Makefile:obj-$(CONFIG_PINCTRL_SH_PFC)    += sh-pfc.o
drivers/pinctrl/sh-pfc/Makefile:sh-pfc-objs                     = core.o pinctrl.o

drivers/pinctrl/sh-pfc/Kconfig:config PINCTRL_SH_PFC
drivers/pinctrl/sh-pfc/Kconfig: def_bool y

...meaning that it currently is not being built as a module by anyone.

Lets remove the modular code that is essentially orphaned, so that
when reading the driver there is no doubt it is builtin-only.

Since module_init already wasn't being used in this code, the init
ordering remains unchanged with this commit.

Also note that MODULE_DEVICE_TABLE is a no-op for non-modular code.

We also delete the MODULE_LICENSE tag etc. since all that information
was (or is now) contained at the top of the file in the comments.

Cc: linux-renesas-soc@vger.kernel.org
Cc: linux-gpio@vger.kernel.org
Signed-off-by: Paul Gortmaker &lt;paul.gortmaker@windriver.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7795: Add CAN FD support</title>
<updated>2016-02-26T12:59:41+00:00</updated>
<author>
<name>Ramesh Shanmugasundaram</name>
<email>ramesh.shanmugasundaram@bp.renesas.com</email>
</author>
<published>2016-02-26T12:37:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4412bb5db6068855b8ad30a058c9d039d3e4f7bd'/>
<id>urn:sha1:4412bb5db6068855b8ad30a058c9d039d3e4f7bd</id>
<content type='text'>
This patch adds CANFD[0-1] pinmux support to r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram &lt;ramesh.shanmugasundaram@bp.renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7795: Add CAN support</title>
<updated>2016-02-26T12:59:41+00:00</updated>
<author>
<name>Ramesh Shanmugasundaram</name>
<email>ramesh.shanmugasundaram@bp.renesas.com</email>
</author>
<published>2016-02-26T12:37:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a4d9791fca507649d772f5d9890bde14f0eadd32'/>
<id>urn:sha1:a4d9791fca507649d772f5d9890bde14f0eadd32</id>
<content type='text'>
This patch adds CAN[0-1] pinmux support to r8a7795 SoC.

Signed-off-by: Ramesh Shanmugasundaram &lt;ramesh.shanmugasundaram@bp.renesas.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7794: Fix GP2[29] muxing</title>
<updated>2016-02-26T12:27:10+00:00</updated>
<author>
<name>Andrey Gusakov</name>
<email>andrey.gusakov@cogentembedded.com</email>
</author>
<published>2016-02-25T19:58:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=abf05e1900a355e5d5bf2ec35ede6261affb6328'/>
<id>urn:sha1:abf05e1900a355e5d5bf2ec35ede6261affb6328</id>
<content type='text'>
GP2[29] muxing is controlled by 2-bit IP6[3:2] field, yet only 3 values
are listed instead of 4...

[Sergei: fixed up the formatting, renamed, added the changelog.]

Signed-off-by: Andrey Gusakov &lt;andrey.gusakov@cogentembedded.com&gt;
Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Use ARCH_RENESAS</title>
<updated>2016-02-26T09:04:21+00:00</updated>
<author>
<name>Simon Horman</name>
<email>horms+renesas@verge.net.au</email>
</author>
<published>2016-02-25T00:51:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fe351cc459d107918f08c86da0800e5ebeb70674'/>
<id>urn:sha1:fe351cc459d107918f08c86da0800e5ebeb70674</id>
<content type='text'>
Make use of ARCH_RENESAS in place of ARCH_SHMOBILE.

This is part of an ongoing process to migrate from ARCH_SHMOBILE to
ARCH_RENESAS the motivation for which being that RENESAS seems to be a more
appropriate name than SHMOBILE for the majority of Renesas ARM based SoCs.

Signed-off-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7794: Add EtherAVB pin groups</title>
<updated>2016-02-18T08:30:59+00:00</updated>
<author>
<name>Sergei Shtylyov</name>
<email>sergei.shtylyov@cogentembedded.com</email>
</author>
<published>2016-02-17T22:32:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4c96cb027be5ceb2c7c0d4dc086d35fd0cfaf14b'/>
<id>urn:sha1:4c96cb027be5ceb2c7c0d4dc086d35fd0cfaf14b</id>
<content type='text'>
Add the EtherAVB pin groups to the R8A7794 PFC driver.

Based on the patches by Mitsuhiro Kimura &lt;mitsuhiro.kimura.kc@renesas.com&gt;.

Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Rework PFC GPIO support</title>
<updated>2016-02-18T08:30:58+00:00</updated>
<author>
<name>Magnus Damm</name>
<email>damm+renesas@opensource.se</email>
</author>
<published>2016-02-17T08:15:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=abc60d483788c0b9363371764c9cb35ee9c6781d'/>
<id>urn:sha1:abc60d483788c0b9363371764c9cb35ee9c6781d</id>
<content type='text'>
The sh-pfc pinctrl driver is currently handling SoC-specific
PFC hardware blocks on ARM64, ARM and SH architectures.

For older SoCs using SH cores and some 32-bit ARM SoCs the PFC
hardware also provides GPIO functionality. On the majority of
32-bit ARM SoCs from Renesas and so far all ARM64 SoCs the GPIO
feature is provided by separate hardware blocks.

So far GPIO support in the PFC driver has been compiled-in for
the majority of the SoCs, but with this patch applied the SoCs
with PFC support may select from one of the following:
 - CONFIG_PINCTRL_SH_PFC - Used if PFC lacks GPIO hardware
 - CONFIG_PINCTRL_SH_PFC_GPIO - Used if PFC includes GPIO support

This patch results in the following changes:
 - The GPIO functionality is only compiled-in on relevant SoCs
 - The number of lines of code is reduced

Build tested using the following configurations:
 - r8a7795 -&gt; CONFIG_PINCTRL_SH_PFC_GPIO=n -&gt; OK (ARM64)
 - r8a7790 -&gt; CONFIG_PINCTRL_SH_PFC_GPIO=n -&gt; OK (ARM)
 - r8a7790 + r8a7740 -&gt; CONFIG_PINCTRL_SH_PFC_GPIO=y -&gt; OK (ARM)
 - r8a7740 -&gt; CONFIG_PINCTRL_SH_PFC_GPIO=y -&gt; OK (ARM)
 - sh7751 -&gt; CONFIG_PINCTRL_SH_PFC=n -&gt; OK (SH rts7751r2d1)
 - sh7724 -&gt; CONFIG_PINCTRL_SH_PFC_GPIO=y -&gt; OK (SH ecovec24)

Signed-off-by: Magnus Damm &lt;damm+renesas@opensource.se&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
[geert: s/def_bool n/bool/]
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7795: Add PWM support</title>
<updated>2016-02-18T08:30:57+00:00</updated>
<author>
<name>Takeshi Kihara</name>
<email>takeshi.kihara.df@renesas.com</email>
</author>
<published>2016-01-19T12:18:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4ca88cf661df1c1e793e707cdbbcdf72b2fad2c1'/>
<id>urn:sha1:4ca88cf661df1c1e793e707cdbbcdf72b2fad2c1</id>
<content type='text'>
This patch adds PWM[0-6] pinmux support to r8a7795 SoC.

Signed-off-by: Takeshi Kihara &lt;takeshi.kihara.df@renesas.com&gt;
[uli: adapted to mainline PFC driver]
Signed-off-by: Ulrich Hecht &lt;ulrich.hecht+renesas@gmail.com&gt;
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
</content>
</entry>
</feed>
