<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/sh-pfc, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2015-07-20T09:01:52+00:00</updated>
<entry>
<title>sh-pfc: fix sparse GPIOs for R-Car SoCs</title>
<updated>2015-07-20T09:01:52+00:00</updated>
<author>
<name>Sergei Shtylyov</name>
<email>sergei.shtylyov@cogentembedded.com</email>
</author>
<published>2015-06-25T22:40:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=61bb3aef92a4d102382f399eafccd5c72be6fdf2'/>
<id>urn:sha1:61bb3aef92a4d102382f399eafccd5c72be6fdf2</id>
<content type='text'>
The PFC driver causes the kernel to hang on the R-Car gen2 SoC based  boards
when the CPU_ALL_PORT() macro is fixed to reflect the reality, i.e. when the
GPIO space becomes actually sparse.  This happens because the _GP_GPIO() macro
includes  an indexed initializer which causes the "holes" (array entries filled
with all 0s) between the groups  of the existing GPIOs; and the driver can't
cope with that.  There seems to  be no reason to use the indexed initializer,
so we can remove the index specifier and so avoid the "holes".

Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Tested-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7794: add SDHI pin groups</title>
<updated>2015-06-16T08:55:09+00:00</updated>
<author>
<name>Shinobu Uehara</name>
<email>shinobu.uehara.xc@renesas.com</email>
</author>
<published>2015-06-05T22:36:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7ac91bda80a05122ca86240b1da3a68a4cdaa982'/>
<id>urn:sha1:7ac91bda80a05122ca86240b1da3a68a4cdaa982</id>
<content type='text'>
Add SDHI0/1/2 pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara &lt;shinobu.uehara.xc@renesas.com&gt;
[Sergei: renamed SD data pins to match the driver, rebased, renamed, added
changelog.]
Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7794: add MMCIF pin groups</title>
<updated>2015-06-16T08:54:01+00:00</updated>
<author>
<name>Shinobu Uehara</name>
<email>shinobu.uehara.xc@renesas.com</email>
</author>
<published>2015-06-05T22:35:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f1f74b640c952e311aebaa594d9d81fecb72cc17'/>
<id>urn:sha1:f1f74b640c952e311aebaa594d9d81fecb72cc17</id>
<content type='text'>
Add MMCIF pin groups to R8A7794 PFC driver.

Signed-off-by: Shinobu Uehara &lt;shinobu.uehara.xc@renesas.com&gt;
[Sergei: rebased, renamed, added changelog.]
Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: add R8A7794 PFC support</title>
<updated>2015-06-16T08:53:20+00:00</updated>
<author>
<name>Hisashi Nakamura</name>
<email>hisashi.nakamura.ak@renesas.com</email>
</author>
<published>2015-06-05T22:34:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=43c4436e2f1890a7b28dc0f0d901866cda99a08c'/>
<id>urn:sha1:43c4436e2f1890a7b28dc0f0d901866cda99a08c</id>
<content type='text'>
Add PFC support for  the  R8A7794 SoC  including pin groups for some
on-chip devices such as ETH, I2C, INTC, MSIOF, QSPI, [H]SCIF...

Sergei: squashed together several patches, fixed the MLB_CLK typo,
added IRQ4.. IRQ9 pin groups, fixed IRQn comments, added ETH B pin
group names, removed stray new line and fixed typos in the  comments
in the pinmux_config_regs[] initializer, removed the platform device
ID, took into account limited number of signals in the GPIO1/5/6
controllers, added reasonable and removed unreasonable
copyrights, modified the bindings document, renamed, added changelog.

Changes in version 5:
- resolved rejects, refreshed the patch;
- added Laurent Pinchart's ACK.

Changes in version 4:
- reused the PORT_GP_26() macro to #define PORT_GP_28().

Changes in version 3:
- removed the platform device ID;
- added PORT_GP_26() and PORT_GP_28() macros, used them for GPIO1/5/6 in the
  CPU_ALL_PORT() macro.

Changes in version 2:
- rebased the patch.

Signed-off-by: Hisashi Nakamura &lt;hisashi.nakamura.ak@renesas.com&gt;
Signed-off-by: Sergei Shtylyov &lt;sergei.shtylyov@cogentembedded.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: make pinctrl_register() return proper error code</title>
<updated>2015-06-10T12:49:52+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-06-09T04:01:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=323de9efdf3e75d1dfb48003a52e59d6d9d4c7a5'/>
<id>urn:sha1:323de9efdf3e75d1dfb48003a52e59d6d9d4c7a5</id>
<content type='text'>
Currently, pinctrl_register() just returns NULL on error, so the
callers can not know the exact reason of the failure.

Some of the pinctrl drivers return -EINVAL, some -ENODEV, and some
-ENOMEM on error of pinctrl_register(), although the error code
might be different from the real cause of the error.

This commit reworks pinctrl_register() to return the appropriate
error code and modifies all of the pinctrl drivers to use IS_ERR()
for the error checking and PTR_ERR() for getting the error code.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Acked-by: Heiko Stuebner &lt;heiko@sntech.de&gt;
Tested-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Lee Jones &lt;lee@kernel.org&gt;
Acked-by: Sören Brinkmann &lt;soren.brinkmann@xilinx.com&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Ray Jui &lt;rjui@broadcom.com&gt;
Acked-by: Antoine Tenart &lt;antoine.tenart@free-electrons.com&gt;
Acked-by: Hongzhou Yang &lt;hongzhou.yang@mediatek.com&gt;
Acked-by: Wei Chen &lt;Wei.Chen@csr.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Spelling s/reseved/reserved/</title>
<updated>2015-06-01T13:49:53+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-05-21T12:05:10+00:00</published>
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<id>urn:sha1:5b441eba3ab928ad1a2e9478fae6aa1397048860</id>
<content type='text'>
Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Reviewed-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7791: Add PWM pin groups and functions</title>
<updated>2015-05-19T14:01:50+00:00</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2015-05-18T01:41:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f9784298e2b4a95be3bd7200075a2fdc61fd9f3b'/>
<id>urn:sha1:f9784298e2b4a95be3bd7200075a2fdc61fd9f3b</id>
<content type='text'>
Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a7790: Add PWM pin groups and functions</title>
<updated>2015-05-19T14:01:25+00:00</updated>
<author>
<name>Yoshihiro Shimoda</name>
<email>yoshihiro.shimoda.uh@renesas.com</email>
</author>
<published>2015-05-14T10:48:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5c89c15b748c011332d855d13f4159d3e06378d9'/>
<id>urn:sha1:5c89c15b748c011332d855d13f4159d3e06378d9</id>
<content type='text'>
Signed-off-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Reviewed-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: r8a73a4: Remove obsolete multi-platform check</title>
<updated>2015-05-12T11:17:44+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert+renesas@glider.be</email>
</author>
<published>2015-04-28T10:15:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e8e36d2f1873218a2fdaf0b7cd335b84e8be6112'/>
<id>urn:sha1:e8e36d2f1873218a2fdaf0b7cd335b84e8be6112</id>
<content type='text'>
As of commit 9d07d414d4c33d86 ("ARM: shmobile: r8a73a4: ape6evm: Remove
legacy platform"), r8a73a4 is only supported in generic ARM
multi-platform builds.  Hence CONFIG_ARCH_MULTIPLATFORM is always set,
and the check can be removed.

Signed-off-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Acked-by: Simon Horman &lt;horms+renesas@verge.net.au&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: sh-pfc: Enable building of r8a7793 PFC support</title>
<updated>2015-05-12T11:17:43+00:00</updated>
<author>
<name>Ulrich Hecht</name>
<email>ulrich.hecht+renesas@gmail.com</email>
</author>
<published>2015-05-12T09:13:20+00:00</published>
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<id>urn:sha1:cb0ba73d09a0deb03b292c39b1c39e1d622e66df</id>
<content type='text'>
Signed-off-by: Ulrich Hecht &lt;ulrich.hecht+renesas@gmail.com&gt;
Acked-by: Geert Uytterhoeven &lt;geert+renesas@glider.be&gt;
Acked-by: Laurent Pinchart &lt;laurent.pinchart@ideasonboard.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
