<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/intel/pinctrl-intel.c, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-30T08:57:52+00:00</updated>
<entry>
<title>pinctrl: intel: implement gpio_irq_enable</title>
<updated>2016-03-30T08:57:52+00:00</updated>
<author>
<name>Qi Zheng</name>
<email>qi.zheng@intel.com</email>
</author>
<published>2016-03-16T18:15:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a939bb57cd4716fdae213f6cb60a626fa6d5a60a'/>
<id>urn:sha1:a939bb57cd4716fdae213f6cb60a626fa6d5a60a</id>
<content type='text'>
There is unexpected gpio interrupt after irq_enable. If not
implemeted gpio_irq_enable callback, irq_enable calls irq_unmask
instead. But if there was interrupt set before the irq_enable,
unmask it may trigger the unexpected interrupt. By implementing
the gpio_irq_enable callback, do interrupt status ack, the issue
has gone.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: make the high level interrupt working</title>
<updated>2016-03-30T08:57:52+00:00</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2016-03-16T18:15:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=bf380cfa60db1f44d4884dbea0372dac5d9db633'/>
<id>urn:sha1:bf380cfa60db1f44d4884dbea0372dac5d9db633</id>
<content type='text'>
High level trigger mode of GPIO interrupt is not set correctly
in intel_gpio_irq_type(), and will make this kind of interrupt
not respond.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: Remove unneeded header includes</title>
<updated>2016-02-12T12:56:57+00:00</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2016-02-12T10:13:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2f749c3ac70334105f918d23743349e34e22c952'/>
<id>urn:sha1:2f749c3ac70334105f918d23743349e34e22c952</id>
<content type='text'>
pinctrl-intel doesn't use anything from &lt;linux/init.h&gt;,
&lt;linux/acpi.h&gt;, &lt;linux/gpio.h&gt; or &lt;linux/pm.h&gt;, so it should not
include these header files.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Cc: Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: use gpiochip data pointer</title>
<updated>2016-01-05T13:14:49+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-12-07T23:18:59+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=acfd4c633aa394ac0323bdb2be95f5b587c0ffbd'/>
<id>urn:sha1:acfd4c633aa394ac0323bdb2be95f5b587c0ffbd</id>
<content type='text'>
This makes the driver use the data pointer added to the gpio_chip
to store a pointer to the state container instead of relying on
container_of().

Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Acked-by: Heikki Krogerus &lt;heikki.krogerus@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v4.4-rc6' into devel</title>
<updated>2015-12-21T08:36:21+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-12-21T08:36:21+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0529357f102b96f68bc199f858d1c3b07f4b674c'/>
<id>urn:sha1:0529357f102b96f68bc199f858d1c3b07f4b674c</id>
<content type='text'>
Linux 4.4-rc6
</content>
</entry>
<entry>
<title>pinctrl: intel: fix offset calculation issue of register PAD_OWN</title>
<updated>2015-12-10T22:01:42+00:00</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2015-11-30T11:20:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=99a735b3c287b70aa67952b1ff3d85cd924d85f9'/>
<id>urn:sha1:99a735b3c287b70aa67952b1ff3d85cd924d85f9</id>
<content type='text'>
The calculation equation of PAD_OWN register offset is not
correct for Broxton, verified this fix will get right
offset for Broxton.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: intel: fix bug of register offset calculation</title>
<updated>2015-12-10T22:01:41+00:00</updated>
<author>
<name>Qipeng Zha</name>
<email>qipeng.zha@intel.com</email>
</author>
<published>2015-11-25T17:09:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=618a919b4c5150408c26f8b4527851f7065f841c'/>
<id>urn:sha1:618a919b4c5150408c26f8b4527851f7065f841c</id>
<content type='text'>
The group size for registers PADCFGLOCK, HOSTSW_OWN, GPI_IS,
GPI_IE, are not 24 for Broxton, Add a parameter to allow
different platform to set correct value.

Signed-off-by: Qi Zheng &lt;qi.zheng@intel.com&gt;
Signed-off-by: Qipeng Zha &lt;qipeng.zha@intel.com&gt;
Acked-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>gpio: change member .dev to .parent</title>
<updated>2015-11-19T08:24:35+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-11-04T08:56:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=58383c78425e4ee1c077253cf297b641c861c02e'/>
<id>urn:sha1:58383c78425e4ee1c077253cf297b641c861c02e</id>
<content type='text'>
The name .dev in a struct is normally reserved for a struct device
that is let us say a superclass to the thing described by the struct.
struct gpio_chip stands out by confusingly using a struct device *dev
to point to the parent device (such as a platform_device) that
represents the hardware. As we want to give gpio_chip:s real devices,
this is not working. We need to rename this member to parent.

This was done by two coccinelle scripts, I guess it is possible to
combine them into one, but I don't know such stuff. They look like
this:

@@
struct gpio_chip *var;
@@
-var-&gt;dev
+var-&gt;parent

and:

@@
struct gpio_chip var;
@@
-var.dev
+var.parent

and:

@@
struct bgpio_chip *var;
@@
-var-&gt;gc.dev
+var-&gt;gc.parent

Plus a few instances of bgpio that I couldn't figure out how
to teach Coccinelle to rewrite.

This patch hits all over the place, but I *strongly* prefer this
solution to any piecemal approaches that just exercise patch
mechanics all over the place. It mainly hits drivers/gpio and
drivers/pinctrl which is my own backyard anyway.

Cc: Haavard Skinnemoen &lt;hskinnemoen@gmail.com&gt;
Cc: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Cc: Richard Purdie &lt;rpurdie@rpsys.net&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@osg.samsung.com&gt;
Cc: Alek Du &lt;alek.du@intel.com&gt;
Cc: Jaroslav Kysela &lt;perex@perex.cz&gt;
Cc: Takashi Iwai &lt;tiwai@suse.com&gt;
Acked-by: Dmitry Torokhov &lt;dmitry.torokhov@gmail.com&gt;
Acked-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
Acked-by: Lee Jones &lt;lee.jones@linaro.org&gt;
Acked-by: Jiri Kosina &lt;jkosina@suse.cz&gt;
Acked-by: Hans-Christian Egtvedt &lt;egtvedt@samfundet.no&gt;
Acked-by: Jacek Anaszewski &lt;j.anaszewski@samsung.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio</title>
<updated>2015-11-02T20:59:12+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-11-02T20:59:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e86328c489d7ecdca99410a06a3f448caf7857bf'/>
<id>urn:sha1:e86328c489d7ecdca99410a06a3f448caf7857bf</id>
<content type='text'>
Pull GPIO updates from Linus Walleij:
 "Here is the bulk of GPIO changes for the v4.4 development cycle.

  The only changes hitting outside drivers/gpio are in the pin control
  subsystem and these seem to have settled nicely in linux-next.

  Development mistakes and catfights are nicely documented in the
  reverts as you can see.  The outcome of the ABI fight is that we're
  working on a chardev ABI for GPIO now, where hope to show results for
  the v4.5 kernel.

  Summary of changes:

  GPIO core:
   - Define and handle flags for open drain/open collector and open
     source/open emitter, also know as "single-ended" configurations.
   - Generic request/free operations that handle calling out to the
     (optional) pin control backend.
   - Some refactoring related to an ABI change that did not happen, yet
     provide useful.
   - Added a real-time compliance checklist.  Many GPIO chips have
     irqchips, and need to think this over with the RT patches going
     upstream.
   - Restructure, fix and clean up Kconfig menus a bit.

  New drivers:
   - New driver for AMD Promony.
   - New driver for ACCES 104-IDIO-16, a port-mapped I/O card,
     ISA-style.  Very retro.

  Subdriver changes:
   - OMAP changes to handle real time requirements.
   - Handle trigger types for edge and level IRQs on PL061 properly.  As
     this hardware is very common it needs to set a proper example for
     others to follow.
   - Some container_of() cleanups.
   - Delete the unused MSM driver in favor of the driver that is
     embedded inside the pin control driver.
   - Cleanup of the ath79 GPIO driver used by many, many OpenWRT router
     targets.
   - A consolidated IT87xx driver replacing the earlier very specific
     IT8761e driver.
   - Handle the TI TCA9539 in the PCA953x driver.  Also handle ACPI
     devices in this subdriver.
   - Drop xilinx arch dependencies as these FPGAs seem to profilate over
     a few different architectures.  MIPS and ARM come to mind"

* tag 'gpio-v4.4-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-gpio: (57 commits)
  gpio: fix up SPI submenu
  gpio: drop surplus I2C dependencies
  gpio: drop surplus X86 dependencies
  gpio: dt-bindings: document the official use of "ngpios"
  gpio: MAINTAINERS: Add an entry for the ATH79 GPIO driver
  gpio / ACPI: Allow shared GPIO event to be read via operation region
  gpio: group port-mapped I/O drivers in a menu
  gpio: Add ACCES 104-IDIO-16 driver maintainer entry
  gpio: zynq: Document interrupt-controller DT binding
  gpio: xilinx: Drop architecture dependencies
  gpio: generic: Revert to old error handling in bgpio_map
  gpio: add a real time compliance notes
  Revert "gpio: add a real time compliance checklist"
  gpio: Add GPIO support for the ACCES 104-IDIO-16
  gpio: driver for AMD Promontory
  gpio: xlp: Convert to use gpiolib irqchip helpers
  gpio: add a real time compliance checklist
  gpio/xilinx: enable for MIPS
  gpiolib: Add and use OF_GPIO_SINGLE_ENDED flag
  gpiolib: Split GPIO flags parsing and GPIO configuration
  ...
</content>
</entry>
<entry>
<title>pinctrl: intel: Allow requesting pins which are in ACPI mode as GPIOs</title>
<updated>2015-10-27T12:30:56+00:00</updated>
<author>
<name>Mika Westerberg</name>
<email>mika.westerberg@linux.intel.com</email>
</author>
<published>2015-10-21T10:08:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4341e8a5458f10cb7265167061fa06ebf3a3a903'/>
<id>urn:sha1:4341e8a5458f10cb7265167061fa06ebf3a3a903</id>
<content type='text'>
Reserved for ACPI actually means that in such case the GPIO hardware will
not update the interrupt status register (GPI_IS) even if the pin is
configured to trigger an interrupt. It will update GPI_GPE_STS instead and
does not trigger an interrupt.

Allow using such pins as GPIOs, only prevent their usage as interrupts.

We also rename function intel_pad_reserved_for_acpi() to be
intel_pad_acpi_mode() which reflects the actual meaning better.

Signed-off-by: Mika Westerberg &lt;mika.westerberg@linux.intel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
