<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pinctrl/Kconfig, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-06-03T20:52:01+00:00</updated>
<entry>
<title>pinctrl: Add pinctrl-aspeed, core pinctrl support for Aspeed SoC</title>
<updated>2016-06-03T20:52:01+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2016-03-24T07:06:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b6461561b1ee4243604f7f9e69e7069f3a7b1f77'/>
<id>urn:sha1:b6461561b1ee4243604f7f9e69e7069f3a7b1f77</id>
<content type='text'>
Add pinctrl/pinmux support for the Aspeed SoCs. Configuration of the
Aspeed SoCs is somewhat intricate: Enabling functions can involve writes
of multiple bits to multiple registers, and signals provided by a pin
are determined on a priority basis. That is, without care, it's possible
to configure a function in the mux and to not gain expected
functionality.

Note that this doesn't implement the pinctrl/pinmux/pinconf for any
particular SoC, just adds the framework to enable defining the features.

Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
</content>
</entry>
<entry>
<title>pinctrl: Turn AMD support to tristate</title>
<updated>2016-02-15T23:11:49+00:00</updated>
<author>
<name>Jean Delvare</name>
<email>jdelvare@suse.de</email>
</author>
<published>2016-02-11T11:06:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=337ea0fb15358c1dafe7f4685a6281086b5bbb40'/>
<id>urn:sha1:337ea0fb15358c1dafe7f4685a6281086b5bbb40</id>
<content type='text'>
The pinctrl-amd driver builds just fine as a module so give
users this option.

Signed-off-by: Jean Delvare &lt;jdelvare@suse.de&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: pinctrl-pic32: Add PIC32 pin control driver</title>
<updated>2016-02-05T22:54:47+00:00</updated>
<author>
<name>Joshua Henderson</name>
<email>joshua.henderson@microchip.com</email>
</author>
<published>2016-02-01T22:48:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2ba384e6c3810733e14e183dedc3406f402a686f'/>
<id>urn:sha1:2ba384e6c3810733e14e183dedc3406f402a686f</id>
<content type='text'>
Add a driver for the pin controller present on the Microchip PIC32
including the specific variant PIC32MZDA. This driver provides pinmux
and pinconfig operations as well as GPIO and IRQ chips for the GPIO
banks.

Signed-off-by: Joshua Henderson &lt;joshua.henderson@microchip.com&gt;
Cc: Ralf Baechle &lt;ralf@linux-mips.org&gt;
Cc: Linus Walleij &lt;linus.walleij@linaro.org&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: tegra: move Tegra pinctrl drivers to sub-directory</title>
<updated>2016-02-05T14:16:43+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-01-23T15:30:08+00:00</published>
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<id>urn:sha1:25cbac7716be6a8d5c57534645ca472d2e4be1fd</id>
<content type='text'>
Tegra has several pinctrl drivers.  Now it is reasonable enough to
move them into drivers/pinctrl/tegra/.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Acked-by: Thierry Reding &lt;treding@nvidia.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: Add STM32 MCUs support</title>
<updated>2016-01-27T13:18:46+00:00</updated>
<author>
<name>Maxime Coquelin</name>
<email>mcoquelin.stm32@gmail.com</email>
</author>
<published>2016-01-14T12:16:30+00:00</published>
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<id>urn:sha1:aceb16dc2da58341bda939defaff0682fac13747</id>
<content type='text'>
This patch adds pinctrl and GPIO support to STMicroelectronic's STM32
family of MCUs.

While it only supports STM32F429 for now, it has been designed to enable
support of other MCUs of the family (e.g. STM32F746).

Acked-by: Patrice Chotard &lt;patrice.chotard@st.com&gt;
Signed-off-by: Maxime Coquelin &lt;mcoquelin.stm32@gmail.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v4.4-rc5' into devel</title>
<updated>2015-12-17T13:57:46+00:00</updated>
<author>
<name>Linus Walleij</name>
<email>linus.walleij@linaro.org</email>
</author>
<published>2015-12-17T13:57:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4dccc93f1e7f4e2fd92a48c40a7ac9211a029352'/>
<id>urn:sha1:4dccc93f1e7f4e2fd92a48c40a7ac9211a029352</id>
<content type='text'>
Linux 4.4-rc5
</content>
</entry>
<entry>
<title>pinctrl: activate pxa architecture</title>
<updated>2015-12-10T15:14:03+00:00</updated>
<author>
<name>Robert Jarzmik</name>
<email>robert.jarzmik@free.fr</email>
</author>
<published>2015-11-21T18:04:53+00:00</published>
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<id>urn:sha1:4b15ec9d42b2004d7114e6714a27b60ba4f27b57</id>
<content type='text'>
As the pxa architecture, at least for pxa27x, supports pin control,
activate it in the pinctrl tree.

Signed-off-by: Robert Jarzmik &lt;robert.jarzmik@free.fr&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: fix a typo in Kconfig</title>
<updated>2015-12-01T09:44:37+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-11-30T07:57:35+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=485dba27e9710fd03e7b35df4d7c4c562286f20e'/>
<id>urn:sha1:485dba27e9710fd03e7b35df4d7c4c562286f20e</id>
<content type='text'>
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: remove redundant if conditional from Kconfig</title>
<updated>2015-11-17T10:47:47+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2015-11-05T06:46:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=932cb839628e9b4660672e93280a41da044601e1'/>
<id>urn:sha1:932cb839628e9b4660672e93280a41da044601e1</id>
<content type='text'>
The whole menu is guarded by

  menu "Pin controllers"
          depends on PINCTRL
      ...
  endmenu

The if conditional outside of it is redundant.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
<entry>
<title>pinctrl: introduce driver for Atmel PIO4 controller</title>
<updated>2015-09-21T18:21:33+00:00</updated>
<author>
<name>Ludovic Desroches</name>
<email>ludovic.desroches@atmel.com</email>
</author>
<published>2015-09-16T15:36:57+00:00</published>
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<id>urn:sha1:776180848b574c9c01217fa958f10843ffce584f</id>
<content type='text'>
Add a pinctrl/gpio driver for Atmel PIO4 controller available on SAMA5D2
chip family.

Signed-off-by: Ludovic Desroches &lt;ludovic.desroches@atmel.com&gt;
Signed-off-by: Linus Walleij &lt;linus.walleij@linaro.org&gt;
</content>
</entry>
</feed>
