<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pci/probe.c, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-05-14T17:30:10+00:00</updated>
<entry>
<title>Merge tag 'pci-v5.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2019-05-14T17:30:10+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-05-14T17:30:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=414147d99b928c574ed76e9374a5d2cb77866a29'/>
<id>urn:sha1:414147d99b928c574ed76e9374a5d2cb77866a29</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "Enumeration changes:

   - Add _HPX Type 3 settings support, which gives firmware more
     influence over device configuration (Alexandru Gagniuc)

   - Support fixed bus numbers from bridge Enhanced Allocation
     capabilities (Subbaraya Sundeep)

   - Add "external-facing" DT property to identify cases where we
     require IOMMU protection against untrusted devices (Jean-Philippe
     Brucker)

   - Enable PCIe services for host controller drivers that use managed
     host bridge alloc (Jean-Philippe Brucker)

   - Log PCIe port service messages with pci_dev, not the pcie_device
     (Frederick Lawler)

   - Convert pciehp from pciehp_debug module parameter to generic
     dynamic debug (Frederick Lawler)

  Peer-to-peer DMA:

   - Add whitelist of Root Complexes that support peer-to-peer DMA
     between Root Ports (Christian König)

  Native controller drivers:

   - Add PCI host bridge DMA ranges for bridges that can't DMA
     everywhere, e.g., iProc (Srinath Mannam)

   - Add Amazon Annapurna Labs PCIe host controller driver (Jonathan
     Chocron)

   - Fix Tegra MSI target allocation so DMA doesn't generate unwanted
     MSIs (Vidya Sagar)

   - Fix of_node reference leaks (Wen Yang)

   - Fix Hyper-V module unload &amp; device removal issues (Dexuan Cui)

   - Cleanup R-Car driver (Marek Vasut)

   - Cleanup Keystone driver (Kishon Vijay Abraham I)

   - Cleanup i.MX6 driver (Andrey Smirnov)

  Significant bug fixes:

   - Reset Lenovo ThinkPad P50 GPU so nouveau works after reboot (Lyude
     Paul)

   - Fix Switchtec firmware update performance issue (Wesley Sheng)

   - Work around Pericom switch link retraining erratum (Stefan Mätje)"

* tag 'pci-v5.2-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (141 commits)
  MAINTAINERS: Add Karthikeyan Mitran and Hou Zhiqiang for Mobiveil PCI
  PCI: pciehp: Remove pointless MY_NAME definition
  PCI: pciehp: Remove pointless PCIE_MODULE_NAME definition
  PCI: pciehp: Remove unused dbg/err/info/warn() wrappers
  PCI: pciehp: Log messages with pci_dev, not pcie_device
  PCI: pciehp: Replace pciehp_debug module param with dyndbg
  PCI: pciehp: Remove pciehp_debug uses
  PCI/AER: Log messages with pci_dev, not pcie_device
  PCI/DPC: Log messages with pci_dev, not pcie_device
  PCI/PME: Replace dev_printk(KERN_DEBUG) with dev_info()
  PCI/AER: Replace dev_printk(KERN_DEBUG) with dev_info()
  PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
  PCI: Replace printk(KERN_INFO) with pr_info(), etc
  PCI: Use dev_printk() when possible
  PCI: Cleanup setup-bus.c comments and whitespace
  PCI: imx6: Allow asynchronous probing
  PCI: dwc: Save root bus for driver remove hooks
  PCI: dwc: Use devm_pci_alloc_host_bridge() to simplify code
  PCI: dwc: Free MSI in dw_pcie_host_init() error path
  PCI: dwc: Free MSI IRQ page in dw_pcie_free_msi()
  ...
</content>
</entry>
<entry>
<title>Merge branch 'pci/printk'</title>
<updated>2019-05-13T23:34:46+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-05-13T23:34:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=192415f4986028db53fb76ebcefecf0d73cb900a'/>
<id>urn:sha1:192415f4986028db53fb76ebcefecf0d73cb900a</id>
<content type='text'>
* pci/printk:
  PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc
  PCI: Replace printk(KERN_INFO) with pr_info(), etc
  PCI: Use dev_printk() when possible
</content>
</entry>
<entry>
<title>Merge branch 'pci/iova-dma-ranges'</title>
<updated>2019-05-13T23:34:45+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-05-13T23:34:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f2e94683162565ff02d8d7386fadee175ab55e40'/>
<id>urn:sha1:f2e94683162565ff02d8d7386fadee175ab55e40</id>
<content type='text'>
  - Add list of legal DMA address ranges to PCI host bridge (Srinath
    Mannam)

  - Reserve inaccessible DMA ranges so IOMMU doesn't allocate them (Srinath
    Mannam)

  - Parse iProc DT dma-ranges to learn what PCI devices can reach via DMA
    (Srinath Mannam)

* pci/iova-dma-ranges:
  PCI: iproc: Add sorted dma ranges resource entries to host bridge
  iommu/dma: Reserve IOVA for PCIe inaccessible DMA address
  PCI: Add dma_ranges window list

# Conflicts:
#	drivers/pci/probe.c
</content>
</entry>
<entry>
<title>Merge branch 'pci/hotplug'</title>
<updated>2019-05-13T23:34:31+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2019-05-13T23:34:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3ea6f739dca4370f89d8c171b4b0433046256798'/>
<id>urn:sha1:3ea6f739dca4370f89d8c171b4b0433046256798</id>
<content type='text'>
  - Fix RPA and RPA DLPAR refcount issues (Tyrel Datwyler)

  - Stop exporting pci_get_hp_params() (Alexandru Gagniuc)

  - Simplify _HPP, _HPX parsing (Alexandru Gagniuc)

  - Add support for _HPX Type 3 settings (Alexandru Gagniuc)

  - Tell firmware we support _HPX Type 3 via _OSC (Alexandru Gagniuc)

* pci/hotplug:
  PCI/ACPI: Advertise _HPX Type 3 support via _OSC
  PCI/ACPI: Implement _HPX Type 3 Setting Record
  PCI/ACPI: Remove the need for 'struct hotplug_params'
  PCI/ACPI: Do not export pci_get_hp_params()
  PCI: rpaphp: Get/put device node reference during slot alloc/dealloc
  PCI: rpadlpar: Fix leaked device_node references in add/remove paths
</content>
</entry>
<entry>
<title>PCI: Replace dev_printk(KERN_DEBUG) with dev_info(), etc</title>
<updated>2019-05-09T12:49:58+00:00</updated>
<author>
<name>Mohan Kumar</name>
<email>mohankumar718@gmail.com</email>
</author>
<published>2019-04-20T04:07:20+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=34c6b7105e5a11174f856483cde8ad6e61b7236a'/>
<id>urn:sha1:34c6b7105e5a11174f856483cde8ad6e61b7236a</id>
<content type='text'>
Replace dev_printk(KERN_DEBUG) with dev_info(), etc to be more consistent
with other logging and avoid checkpatch warnings.

The KERN_DEBUG messages could be converted to dev_dbg(), but that depends
on CONFIG_DYNAMIC_DEBUG and DEBUG, and we want most of these messages to
*always* be in the dmesg log.

Link: https://lore.kernel.org/lkml/1555733240-19875-1-git-send-email-mohankumar718@gmail.com
Signed-off-by: Mohan Kumar &lt;mohankumar718@gmail.com&gt;
[bhelgaas: commit log]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Add dma_ranges window list</title>
<updated>2019-05-06T21:02:47+00:00</updated>
<author>
<name>Srinath Mannam</name>
<email>srinath.mannam@broadcom.com</email>
</author>
<published>2019-05-03T14:05:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e80a91ad302b3b66822756afc61f9f9c1658b9c9'/>
<id>urn:sha1:e80a91ad302b3b66822756afc61f9f9c1658b9c9</id>
<content type='text'>
Add a dma_ranges field in PCI host bridge structure to hold resource
entries list of memory regions in sorted order representing memory ranges
that can be accessed through DMA transactions.

Based-on-a-patch-by: Oza Pawandeep &lt;oza.oza@broadcom.com&gt;
Signed-off-by: Srinath Mannam &lt;srinath.mannam@broadcom.com&gt;
[lorenzo.pieralisi@arm.com: updated commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Oza Pawandeep &lt;poza@codeaurora.org&gt;
Acked-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ACPI: Implement _HPX Type 3 Setting Record</title>
<updated>2019-04-23T21:38:09+00:00</updated>
<author>
<name>Alexandru Gagniuc</name>
<email>mr.nuke.me@gmail.com</email>
</author>
<published>2019-02-08T16:24:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f873c51a155aaa6dafdc00fa7fda3754f2f9f794'/>
<id>urn:sha1:f873c51a155aaa6dafdc00fa7fda3754f2f9f794</id>
<content type='text'>
The _HPX Type 3 Setting Record is intended to be more generic and allow
configuration of settings not possible with Type 2 records.  For example,
firmware could ensure that the completion timeout value is set accordingly
throughout the PCI tree.

Implement support for _HPX Type 3 Setting Records, which were added in the
ACPI 6.3 spec.

Link: https://lore.kernel.org/lkml/20190208162414.3996-4-mr.nuke.me@gmail.com
Signed-off-by: Alexandru Gagniuc &lt;mr.nuke.me@gmail.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI/ACPI: Remove the need for 'struct hotplug_params'</title>
<updated>2019-04-23T21:38:05+00:00</updated>
<author>
<name>Alexandru Gagniuc</name>
<email>mr.nuke.me@gmail.com</email>
</author>
<published>2019-04-19T19:27:36+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=87fcf12e846a5028c14d21a94a0712fd1ad5bad0'/>
<id>urn:sha1:87fcf12e846a5028c14d21a94a0712fd1ad5bad0</id>
<content type='text'>
We used to first parse all the _HPP and _HPX tables before using the
information to program registers of PCIe devices.  Up through HPX Type 2,
there was only one structure of each type, so we could cheat and store it
on the stack.

With HPX Type 3 we get an arbitrary number of entries, so the above model
doesn't scale that well.  Instead of parsing all tables at once, parse and
program each entry separately.  For _HPP and _HPX Types 0 through 2, this
is functionally equivalent.  The change enables the upcoming _HPX Type 3 to
integrate more easily.

Link: https://lore.kernel.org/lkml/20190208162414.3996-3-mr.nuke.me@gmail.com
Signed-off-by: Alexandru Gagniuc &lt;mr.nuke.me@gmail.com&gt;
[bhelgaas: fix build errors]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Assign bus numbers present in EA capability for bridges</title>
<updated>2019-04-17T20:09:01+00:00</updated>
<author>
<name>Subbaraya Sundeep</name>
<email>sbhatta@marvell.com</email>
</author>
<published>2018-11-19T13:14:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2dbce590117981196fe355efc0569bc6f949ae9b'/>
<id>urn:sha1:2dbce590117981196fe355efc0569bc6f949ae9b</id>
<content type='text'>
The "Enhanced Allocation (EA) for Memory and I/O Resources" ECN, approved
23 October 2014, sec 6.9.1.2, specifies a second DW in the capability for
type 1 (bridge) functions to describe fixed secondary and subordinate bus
numbers.  This ECN was included in the PCIe r4.0 spec, but sec 6.9.1.2 was
omitted, presumably by mistake.

Read fixed bus numbers from the EA capability for bridges.

Signed-off-by: Subbaraya Sundeep &lt;sbhatta@marvell.com&gt;
[bhelgaas: add pci_ea_fixed_busnrs() return value]
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
</content>
</entry>
<entry>
<title>PCI: Init PCIe feature bits for managed host bridge alloc</title>
<updated>2019-04-05T22:45:39+00:00</updated>
<author>
<name>Jean-Philippe Brucker</name>
<email>jean-philippe.brucker@arm.com</email>
</author>
<published>2019-03-18T16:07:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6302bf3ef78dd210b5ff4a922afcb7d8eff8a211'/>
<id>urn:sha1:6302bf3ef78dd210b5ff4a922afcb7d8eff8a211</id>
<content type='text'>
Two functions allocate a host bridge: devm_pci_alloc_host_bridge() and
pci_alloc_host_bridge().  At the moment, only the unmanaged one initializes
the PCIe feature bits, which prevents from using features such as hotplug
or AER on some systems, when booting with device tree.  Make the
initialization code common.

Fixes: 02bfeb484230 ("PCI/portdrv: Simplify PCIe feature permission checking")
Signed-off-by: Jean-Philippe Brucker &lt;jean-philippe.brucker@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
CC: stable@vger.kernel.org	# v4.17+
</content>
</entry>
</feed>
