<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pci/host, branch dev-4.17</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.17'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2018-08-15T16:11:07+00:00</updated>
<entry>
<title>x86: Don't include linux/irq.h from asm/hardirq.h</title>
<updated>2018-08-15T16:11:07+00:00</updated>
<author>
<name>Nicolai Stange</name>
<email>nstange@suse.de</email>
</author>
<published>2018-07-29T10:15:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7654bab9d7d0aac9a9b7903483afcb1b180140b0'/>
<id>urn:sha1:7654bab9d7d0aac9a9b7903483afcb1b180140b0</id>
<content type='text'>
commit 447ae316670230d7d29430e2cbf1f5db4f49d14c upstream

The next patch in this series will have to make the definition of
irq_cpustat_t available to entering_irq().

Inclusion of asm/hardirq.h into asm/apic.h would cause circular header
dependencies like

  asm/smp.h
    asm/apic.h
      asm/hardirq.h
        linux/irq.h
          linux/topology.h
            linux/smp.h
              asm/smp.h

or

  linux/gfp.h
    linux/mmzone.h
      asm/mmzone.h
        asm/mmzone_64.h
          asm/smp.h
            asm/apic.h
              asm/hardirq.h
                linux/irq.h
                  linux/irqdesc.h
                    linux/kobject.h
                      linux/sysfs.h
                        linux/kernfs.h
                          linux/idr.h
                            linux/gfp.h

and others.

This causes compilation errors because of the header guards becoming
effective in the second inclusion: symbols/macros that had been defined
before wouldn't be available to intermediate headers in the #include chain
anymore.

A possible workaround would be to move the definition of irq_cpustat_t
into its own header and include that from both, asm/hardirq.h and
asm/apic.h.

However, this wouldn't solve the real problem, namely asm/harirq.h
unnecessarily pulling in all the linux/irq.h cruft: nothing in
asm/hardirq.h itself requires it. Also, note that there are some other
archs, like e.g. arm64, which don't have that #include in their
asm/hardirq.h.

Remove the linux/irq.h #include from x86' asm/hardirq.h.

Fix resulting compilation errors by adding appropriate #includes to *.c
files as needed.

Note that some of these *.c files could be cleaned up a bit wrt. to their
set of #includes, but that should better be done from separate patches, if
at all.

Signed-off-by: Nicolai Stange &lt;nstange@suse.de&gt;
Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>PCI: hv: Disable/enable IRQs rather than BH in hv_compose_msi_msg()</title>
<updated>2018-07-22T13:16:05+00:00</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2018-07-09T18:16:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e0b0a684d565dfee40b017a5db355a08d80a1db6'/>
<id>urn:sha1:e0b0a684d565dfee40b017a5db355a08d80a1db6</id>
<content type='text'>
commit 35a88a18d7ea58600e11590405bc93b08e16e7f5 upstream.

Commit de0aa7b2f97d ("PCI: hv: Fix 2 hang issues in hv_compose_msi_msg()")
uses local_bh_disable()/enable(), because hv_pci_onchannelcallback() can
also run in tasklet context as the channel event callback, so bottom halves
should be disabled to prevent a race condition.

With CONFIG_PROVE_LOCKING=y in the recent mainline, or old kernels that
don't have commit f71b74bca637 ("irq/softirqs: Use lockdep to assert IRQs
are disabled/enabled"), when the upper layer IRQ code calls
hv_compose_msi_msg() with local IRQs disabled, we'll see a warning at the
beginning of __local_bh_enable_ip():

  IRQs not enabled as expected
    WARNING: CPU: 0 PID: 408 at kernel/softirq.c:162 __local_bh_enable_ip

The warning exposes an issue in de0aa7b2f97d: local_bh_enable() can
potentially call do_softirq(), which is not supposed to run when local IRQs
are disabled. Let's fix this by using local_irq_save()/restore() instead.

Note: hv_pci_onchannelcallback() is not a hot path because it's only called
when the PCI device is hot added and removed, which is infrequent.

Fixes: de0aa7b2f97d ("PCI: hv: Fix 2 hang issues in hv_compose_msi_msg()")
Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Reviewed-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
Cc: stable@vger.kernel.org
Cc: Stephen Hemminger &lt;sthemmin@microsoft.com&gt;
Cc: K. Y. Srinivasan &lt;kys@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: hv: Make sure the bus domain is really unique</title>
<updated>2018-07-03T09:26:58+00:00</updated>
<author>
<name>Sridhar Pitchai</name>
<email>Sridhar.Pitchai@microsoft.com</email>
</author>
<published>2018-05-01T17:56:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d6ae41669452ec519058c36403bad333ef1fa2bc'/>
<id>urn:sha1:d6ae41669452ec519058c36403bad333ef1fa2bc</id>
<content type='text'>
commit 29927dfb7f69bcf2ae7fd1cda10997e646a5189c upstream.

When Linux runs as a guest VM in Hyper-V and Hyper-V adds the virtual PCI
bus to the guest, Hyper-V always provides unique PCI domain.

commit 4a9b0933bdfc ("PCI: hv: Use device serial number as PCI domain")
overrode unique domain with the serial number of the first device added to
the virtual PCI bus.

The reason for that patch was to have a consistent and short name for the
device, but Hyper-V doesn't provide unique serial numbers. Using non-unique
serial numbers as domain IDs leads to duplicate device addresses, which
causes PCI bus registration to fail.

commit 0c195567a8f6 ("netvsc: transparent VF management") avoids the need
for commit 4a9b0933bdfc ("PCI: hv: Use device serial number as PCI
domain").  When scripts were used to configure VF devices, the name of
the VF needed to be consistent and short, but with commit 0c195567a8f6
("netvsc: transparent VF management") all the setup is done in the kernel,
and we do not need to maintain consistent name.

Revert commit 4a9b0933bdfc ("PCI: hv: Use device serial number as PCI
domain") so we can reliably support multiple devices being assigned to
a guest.

Tag the patch for stable kernels containing commit 0c195567a8f6
("netvsc: transparent VF management").

Fixes: 4a9b0933bdfc ("PCI: hv: Use device serial number as PCI domain")
Signed-off-by: Sridhar Pitchai &lt;sridhar.pitchai@microsoft.com&gt;
[lorenzo.pieralisi@arm.com: trimmed commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Cc: stable@vger.kernel.org # v4.14+
Reviewed-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: hv: Do not wait forever on a device that has disappeared</title>
<updated>2018-06-11T20:43:19+00:00</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2018-05-23T21:12:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2d3cc89eb0d36f1b8e83f15304332a21595d6b2b'/>
<id>urn:sha1:2d3cc89eb0d36f1b8e83f15304332a21595d6b2b</id>
<content type='text'>
commit c3635da2a336441253c33298b87b3042db100725 upstream.

Before the guest finishes the device initialization, the device can be
removed anytime by the host, and after that the host won't respond to
the guest's request, so the guest should be prepared to handle this
case.

Add a polling mechanism to detect device presence.

Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
[lorenzo.pieralisi@arm.com: edited commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
Cc: Stephen Hemminger &lt;sthemmin@microsoft.com&gt;
Cc: K. Y. Srinivasan &lt;kys@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: aardvark: Fix PCIe Max Read Request Size setting</title>
<updated>2018-04-16T10:48:45+00:00</updated>
<author>
<name>Evan Wang</name>
<email>xswang@marvell.com</email>
</author>
<published>2018-04-06T14:55:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fc31c4e347c9dad50544d01d5ee98b22c7df88bb'/>
<id>urn:sha1:fc31c4e347c9dad50544d01d5ee98b22c7df88bb</id>
<content type='text'>
There is an obvious typo issue in the definition of the PCIe maximum
read request size: a bit shift is directly used as a value, while it
should be used to shift the correct value.

Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Evan Wang &lt;xswang@marvell.com&gt;
Reviewed-by: Victor Gu &lt;xigu@marvell.com&gt;
Reviewed-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: aardvark: Use ISR1 instead of ISR0 interrupt in legacy irq mode</title>
<updated>2018-04-16T10:48:32+00:00</updated>
<author>
<name>Victor Gu</name>
<email>xigu@marvell.com</email>
</author>
<published>2018-04-06T14:55:33+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3430f924a62905891c8fa9a3b97ea52007795bc3'/>
<id>urn:sha1:3430f924a62905891c8fa9a3b97ea52007795bc3</id>
<content type='text'>
The Aardvark has two interrupts sets:

 - first set is bit[23:16] of PCIe ISR 0 register(RD0074840h)

 - second set is bit[11:8] of PCIe ISR 1 register(RD0074848h)

Only one set should be used, while another set should be masked.

The second set, ISR1, is more advanced, the Legacy INT_X status bit is
asserted once Assert_INTX message is received, and de-asserted after
Deassert_INTX message is received which matches what the driver is
currently doing in the -&gt;irq_mask() and -&gt;irq_unmask() functions.

The ISR0 requires additional work to deassert the interrupt, which the
driver does not currently implement, therefore it needs fixing.

Update the driver to use ISR1 register set, fixing current
implementation.

Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Link: https://bugzilla.kernel.org/show_bug.cgi?id=196339
Signed-off-by: Victor Gu &lt;xigu@marvell.com&gt;
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;
[lorenzo.pieralisi@arm.com: updated the commit log]
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
Reviewed-by: Evan Wang &lt;xswang@marvell.com&gt;
Reviewed-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
Cc: &lt;stable@vger.kernel.org&gt;
</content>
</entry>
<entry>
<title>PCI: aardvark: Set PIO_ADDR_LS correctly in advk_pcie_rd_conf()</title>
<updated>2018-04-16T10:21:18+00:00</updated>
<author>
<name>Victor Gu</name>
<email>xigu@marvell.com</email>
</author>
<published>2018-04-06T14:55:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4fa3999ee672c54a5498ce98e20fe3fdf9c1cbb4'/>
<id>urn:sha1:4fa3999ee672c54a5498ce98e20fe3fdf9c1cbb4</id>
<content type='text'>
When setting the PIO_ADDR_LS register during a configuration read, we
were properly passing the device number, function number and register
number, but not the bus number, causing issues when reading the
configuration of PCIe devices.

Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Victor Gu &lt;xigu@marvell.com&gt;
Reviewed-by: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>PCI: aardvark: Fix logic in advk_pcie_{rd,wr}_conf()</title>
<updated>2018-04-16T10:21:00+00:00</updated>
<author>
<name>Victor Gu</name>
<email>xigu@marvell.com</email>
</author>
<published>2018-04-06T14:55:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=660661afcd40ed7f515ef3369721ed58e80c0fc5'/>
<id>urn:sha1:660661afcd40ed7f515ef3369721ed58e80c0fc5</id>
<content type='text'>
The PCI configuration space read/write functions were special casing
the situation where PCI_SLOT(devfn) != 0, and returned
PCIBIOS_DEVICE_NOT_FOUND in this case.

However, while this is what is intended for the root bus, it is not
intended for the child busses, as it prevents discovering devices with
PCI_SLOT(x) != 0. Therefore, we return PCIBIOS_DEVICE_NOT_FOUND only
if we're on the root bus.

Fixes: 8c39d710363c1 ("PCI: aardvark: Add Aardvark PCI host controller driver")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Victor Gu &lt;xigu@marvell.com&gt;
Reviewed-by: Wilson Ding &lt;dingwei@marvell.com&gt;
Reviewed-by: Nadav Haklai &lt;nadavh@marvell.com&gt;
[Thomas: tweak commit log.]
Signed-off-by: Thomas Petazzoni &lt;thomas.petazzoni@bootlin.com&gt;
Signed-off-by: Lorenzo Pieralisi &lt;lorenzo.pieralisi@arm.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'lorenzo/pci/xilinx'</title>
<updated>2018-04-04T18:28:57+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-04-04T18:28:57+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7432acf315254aae540609d2370543b5488a317a'/>
<id>urn:sha1:7432acf315254aae540609d2370543b5488a317a</id>
<content type='text'>
* lorenzo/pci/xilinx:
  PCI: pcie-xilinx-nwl: Fix mask value to disable MSIs
</content>
</entry>
<entry>
<title>Merge branch 'lorenzo/pci/xgene'</title>
<updated>2018-04-04T18:28:56+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2018-04-04T18:28:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d2f48c5d7fd791104f3227d8e6b55fca892eb2ba'/>
<id>urn:sha1:d2f48c5d7fd791104f3227d8e6b55fca892eb2ba</id>
<content type='text'>
* lorenzo/pci/xgene:
  PCI: xgene: Fix the xgene_msi_probe() return code
</content>
</entry>
</feed>
