<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/pci/host, branch dev-4.10</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10'/>
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<updated>2017-04-12T10:42:10+00:00</updated>
<entry>
<title>PCI: xgene: Fix double free on init error</title>
<updated>2017-04-12T10:42:10+00:00</updated>
<author>
<name>Dan Carpenter</name>
<email>dan.carpenter@oracle.com</email>
</author>
<published>2017-04-04T19:32:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fcfd2ac4abfbeddaec28499481647b4db35bede2'/>
<id>urn:sha1:fcfd2ac4abfbeddaec28499481647b4db35bede2</id>
<content type='text'>
[ Upstream commit 1ded56df3247d358390ae6dc09ccee620262ac5f ]

The "port" variable was allocated with devm_kzalloc() so if we free it with
kfree() it will be freed twice.  Also I changed it to propogate the error
from devm_ioremap_resource() instead of returning -ENOMEM.

Fixes: c5d460396100 ("PCI: Add MCFG quirks for X-Gene host controller")
Also-posted-by: Shawn Lin &lt;shawn.lin@rock-chips.com&gt;
Signed-off-by: Dan Carpenter &lt;dan.carpenter@oracle.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Tanmay Inamdar &lt;tinamdar@apm.com&gt;
Signed-off-by: Sasha Levin &lt;alexander.levin@verizon.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>PCI: thunder-pem: Fix legacy firmware PEM-specific resources</title>
<updated>2017-04-12T10:42:04+00:00</updated>
<author>
<name>Tomasz Nowicki</name>
<email>tn@semihalf.com</email>
</author>
<published>2017-03-31T15:06:44+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a709613559d6df9bc34d1d9283b0169cad1bbb65'/>
<id>urn:sha1:a709613559d6df9bc34d1d9283b0169cad1bbb65</id>
<content type='text'>
commit feb199ebef488a9f2c3550fb10524f3dac9d8abe upstream.

SZ_16M PEM resource size includes PEM-specific register and its children
resources. Reservation of the whole SZ_16M range leads to child device
driver failure when pcieport driver is requesting resources:

  pcieport 0004:1f:00.0: can't enable device: BAR 0 [mem 0x87e0c0f00000-0x87e0c0ffffff 64bit] not claimed

So we cannot reserve full 16M here and instead we want to reserve
PEM-specific register only which is SZ_64K.

At the end increase PEM resource to SZ_16M since this is what
thunder_pem_init() call expects for proper initialization.

Fixes: 9abb27c7594a ("PCI: thunder-pem: Add legacy firmware support for Cavium ThunderX host controller")
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: thunder-pem: Add legacy firmware support for Cavium ThunderX host controller</title>
<updated>2017-04-12T10:42:04+00:00</updated>
<author>
<name>Tomasz Nowicki</name>
<email>tn@semihalf.com</email>
</author>
<published>2017-03-23T22:10:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f8709a9ec8ae83a8322c526bd6965f58ae1a4c79'/>
<id>urn:sha1:f8709a9ec8ae83a8322c526bd6965f58ae1a4c79</id>
<content type='text'>
commit 9abb27c7594a62bbf6385e20b7f5a90b4eceae2f upstream.

During early days of PCI quirks support, ThunderX firmware did not provide
PNP0c02 node with PCI configuration space and PEM-specific register ranges.
This means that for legacy FW we are not reserving these resources and
cannot gather PEM-specific resources for further PEM initialization.

To support already deployed legacy FW, calculate PEM-specific ranges and
provide resources reservation as fallback scenario into PEM driver when we
could not gather PEM reg base from ACPI tables.

Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Vadim Lomovtsev &lt;Vadim.Lomovtsev@caviumnetworks.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: thunder-pem: Use Cavium assigned hardware ID for ThunderX host controller</title>
<updated>2017-04-08T07:35:06+00:00</updated>
<author>
<name>Tomasz Nowicki</name>
<email>tn@semihalf.com</email>
</author>
<published>2017-03-23T22:10:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d2e79b56ba2ea77dcac7f73a5b5f3f371a27b921'/>
<id>urn:sha1:d2e79b56ba2ea77dcac7f73a5b5f3f371a27b921</id>
<content type='text'>
commit 81caa91b72fd6a0b8dfc5eb10942c34f7efd2bc5 upstream.

"CAV" is the only PNP/ACPI hardware ID vendor prefix assigned to Cavium so
fix this as it should be from day one.

Fixes: 44f22bd91e88 ("PCI: Add MCFG quirks for Cavium ThunderX pass2.x host controller")
Tested-by: Robert Richter &lt;rrichter@cavium.com&gt;
Signed-off-by: Tomasz Nowicki &lt;tn@semihalf.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Robert Richter &lt;rrichter@cavium.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: iproc: Save host bridge window resource in struct iproc_pcie</title>
<updated>2017-04-08T07:35:06+00:00</updated>
<author>
<name>Bjorn Helgaas</name>
<email>bhelgaas@google.com</email>
</author>
<published>2017-03-09T17:27:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d9c6a97b3fae189bda515c7b248322edcd3b7fc4'/>
<id>urn:sha1:d9c6a97b3fae189bda515c7b248322edcd3b7fc4</id>
<content type='text'>
commit 6e347b5e05ea2ac4ac467a5a1cfaebb2c7f06f80 upstream.

The host bridge memory window resource is inserted into the iomem_resource
tree and cannot be deallocated until the host bridge itself is removed.

Previously, the window was on the stack, which meant the iomem_resource
entry pointed into the stack and was corrupted as soon as the probe
function returned, which caused memory corruption and errors like this:

  pcie_iproc_bcma bcma0:8: resource collision: [mem 0x40000000-0x47ffffff] conflicts with PCIe MEM space [mem 0x40000000-0x47ffffff]

Move the memory window resource from the stack into struct iproc_pcie so
its lifetime matches that of the host bridge.

Fixes: c3245a566400 ("PCI: iproc: Request host bridge window resources")
Reported-and-tested-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: altera: Fix TLP_CFG_DW0 for TLP write</title>
<updated>2017-03-12T05:44:14+00:00</updated>
<author>
<name>Ley Foon Tan</name>
<email>ley.foon.tan@intel.com</email>
</author>
<published>2017-02-28T10:37:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2c849a5c6a83721b4c64dfc1e6851c2c8042c54b'/>
<id>urn:sha1:2c849a5c6a83721b4c64dfc1e6851c2c8042c54b</id>
<content type='text'>
commit 2a7275a3d867b228216886aae35e1f64291180b1 upstream.

eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage") used
TLP_FMTTYPE_CFGRD* (instead of TLP_FMTTYPE_CFGWR*) for TLP writes, which
causes writing to configuration space to fail.  Fix it by using correct
FMTTYPE for write operation.

Fixes: eb5767122feb ("PCI: altera: Simplify TLB_CFG_DW0 usage")
Signed-off-by: Ley Foon Tan &lt;ley.foon.tan@intel.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI: hv: Fix wslot_to_devfn() to fix warnings on device removal</title>
<updated>2017-03-12T05:44:14+00:00</updated>
<author>
<name>Dexuan Cui</name>
<email>decui@microsoft.com</email>
</author>
<published>2017-02-10T21:18:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=91f5bce789d9083f1e24bc09b00c8c781c015835'/>
<id>urn:sha1:91f5bce789d9083f1e24bc09b00c8c781c015835</id>
<content type='text'>
commit 60e2e2fbafdd1285ae1b4ad39ded41603e0c74d0 upstream.

The devfn of 00:02.0 is 0x10.  devfn_to_wslot(0x10) == 0x2, and
wslot_to_devfn(0x2) should be 0x10, while it's 0x2 in the current code.

Due to this, hv_eject_device_work() -&gt; pci_get_domain_bus_and_slot()
returns NULL and pci_stop_and_remove_bus_device() is not called.

Later when the real device driver's .remove() is invoked by
hv_pci_remove() -&gt; pci_stop_root_bus(), some warnings can be noticed
because the VM has lost the access to the underlying device at that
time.

Signed-off-by: Jake Oshins &lt;jakeo@microsoft.com&gt;
Signed-off-by: Dexuan Cui &lt;decui@microsoft.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Haiyang Zhang &lt;haiyangz@microsoft.com&gt;
CC: K. Y. Srinivasan &lt;kys@microsoft.com&gt;
CC: Stephen Hemminger &lt;sthemmin@microsoft.com&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>PCI/MSI: pci-xgene-msi: Fix CPU hotplug registration handling</title>
<updated>2017-01-17T14:41:51+00:00</updated>
<author>
<name>Marc Zyngier</name>
<email>marc.zyngier@arm.com</email>
</author>
<published>2017-01-17T14:21:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4d191b1b63c209e37bf27938ef365244d3c41084'/>
<id>urn:sha1:4d191b1b63c209e37bf27938ef365244d3c41084</id>
<content type='text'>
The conversion to the new hotplug state machine introduced a regression
where a successful hotplug registration would be treated as an error,
effectively disabling the MSI driver forever.

Fix it by doing the proper check on the return value.

Fixes: 9c248f8896e6 ("PCI/xgene-msi: Convert to hotplug state machine")
Signed-off-by: Marc Zyngier &lt;marc.zyngier@arm.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-by: Sebastian Andrzej Siewior &lt;bigeasy@linutronix.de&gt;
Tested-by: Duc Dang &lt;dhdang@apm.com&gt;
CC: Thomas Gleixner &lt;tglx@linutronix.de&gt;
CC: stable@vger.kernel.org</content>
</entry>
<entry>
<title>PCI: designware: Check for iATU unroll only on platforms that use ATU</title>
<updated>2017-01-10T14:43:24+00:00</updated>
<author>
<name>Murali Karicheri</name>
<email>m-karicheri2@ti.com</email>
</author>
<published>2017-01-04T19:32:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a782b5f986c3fa1cfa7f2b57941200c6a5809242'/>
<id>urn:sha1:a782b5f986c3fa1cfa7f2b57941200c6a5809242</id>
<content type='text'>
Previously we checked for iATU unroll support by reading PCIE_ATU_VIEWPORT
even on platforms, e.g., Keystone, that do not have ATU ports.  This can
cause bad behavior such as asynchronous external aborts:

  OF: PCI:   MEM 0x60000000..0x6fffffff -&gt; 0x60000000
  Unhandled fault: asynchronous external abort (0x1211) at 0x00000000
  pgd = c0003000
  [00000000] *pgd=80000800004003, *pmd=00000000
  Internal error: : 1211 [#1] PREEMPT SMP ARM
  Modules linked in:
  CPU: 0 PID: 1 Comm: swapper/0 Not tainted 4.9.0-00009-g6ff59d2-dirty #7
  Hardware name: Keystone
  task: eb878000 task.stack: eb866000
  PC is at dw_pcie_setup_rc+0x24/0x380
  LR is at ks_pcie_host_init+0x10/0x170

Move the dw_pcie_iatu_unroll_enabled() check so we only call it on
platforms that do not use the ATU.  These platforms supply their own
-&gt;rd_other_conf() and -&gt;wr_other_conf() methods.

[bhelgaas: changelog]
Fixes: a0601a470537 ("PCI: designware: Add iATU Unroll feature")
Fixes: 416379f9ebde ("PCI: designware: Check for iATU unroll support after initializing host")
Tested-by: Kishon Vijay Abraham I &lt;kishon@ti.com&gt;
Signed-off-by: Murali Karicheri &lt;m-karicheri2@ti.com&gt;
Signed-off-by: Bjorn Helgaas &lt;bhelgaas@google.com&gt;
Acked-By: Joao Pinto &lt;jpinto@synopsys.com&gt;
CC: stable@vger.kernel.org	# v4.9+</content>
</entry>
<entry>
<title>Merge tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci</title>
<updated>2016-12-15T20:46:48+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2016-12-15T20:46:48+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0ab7b12c49b6fbf2d4d0381374b82935f949be5f'/>
<id>urn:sha1:0ab7b12c49b6fbf2d4d0381374b82935f949be5f</id>
<content type='text'>
Pull PCI updates from Bjorn Helgaas:
 "PCI changes:

   - add support for PCI on ARM64 boxes with ACPI. We already had this
     for theoretical spec-compliant hardware; now we're adding quirks
     for the actual hardware (Cavium, HiSilicon, Qualcomm, X-Gene)

   - add runtime PM support for hotplug ports

   - enable runtime suspend for Intel UHCI that uses platform-specific
     wakeup signaling

   - add yet another host bridge registration interface. We hope this is
     extensible enough to subsume the others

   - expose device revision in sysfs for DRM

   - to avoid device conflicts, make sure any VF BAR updates are done
     before enabling the VF

   - avoid unnecessary link retrains for ASPM

   - allow INTx masking on Mellanox devices that support it

   - allow access to non-standard VPD for Chelsio devices

   - update Broadcom iProc support for PAXB v2, PAXC v2, inbound DMA,
     etc

   - update Rockchip support for max-link-speed

   - add NVIDIA Tegra210 support

   - add Layerscape LS1046a support

   - update R-Car compatibility strings

   - add Qualcomm MSM8996 support

   - remove some uninformative bootup messages"

* tag 'pci-v4.10-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/helgaas/pci: (115 commits)
  PCI: Enable access to non-standard VPD for Chelsio devices (cxgb3)
  PCI: Expand "VPD access disabled" quirk message
  PCI: pciehp: Remove loading message
  PCI: hotplug: Remove hotplug core message
  PCI: Remove service driver load/unload messages
  PCI/AER: Log AER IRQ when claiming Root Port
  PCI/AER: Log errors with PCI device, not PCIe service device
  PCI/AER: Remove unused version macros
  PCI/PME: Log PME IRQ when claiming Root Port
  PCI/PME: Drop unused support for PMEs from Root Complex Event Collectors
  PCI: Move config space size macros to pci_regs.h
  x86/platform/intel-mid: Constify mid_pci_platform_pm
  PCI/ASPM: Don't retrain link if ASPM not possible
  PCI: iproc: Skip check for legacy IRQ on PAXC buses
  PCI: pciehp: Leave power indicator on when enabling already-enabled slot
  PCI: pciehp: Prioritize data-link event over presence detect
  PCI: rcar: Add gen3 fallback compatibility string for pcie-rcar
  PCI: rcar: Use gen2 fallback compatibility last
  PCI: rcar-gen2: Use gen2 fallback compatibility last
  PCI: rockchip: Move the deassert of pm/aclk/pclk after phy_init()
  ..
</content>
</entry>
</feed>
