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<title>BMC/Intel-BMC/linux.git/drivers/net/ethernet/mscc, branch dev-4.18</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.18</id>
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<updated>2018-10-18T07:18:11+00:00</updated>
<entry>
<title>net: mscc: fix the frame extraction into the skb</title>
<updated>2018-10-18T07:18:11+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@bootlin.com</email>
</author>
<published>2018-09-20T10:08:54+00:00</published>
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<id>urn:sha1:6133d8e499e6a88b9a938243e1b8a6aa1f79ec8c</id>
<content type='text'>
[ Upstream commit 652ef42c134da1bbb03bd4c9b4291dfaf8d7febb ]

When extracting frames from the Ocelot switch, the frame check sequence
(FCS) is present at the end of the data extracted. The FCS was put into
the sk buffer which introduced some issues (as length related ones), as
the FCS shouldn't be part of an Rx sk buffer.

This patch fixes the Ocelot switch extraction behaviour by discarding
the FCS.

Fixes: a556c76adc05 ("net: mscc: Add initial Ocelot switch support")
Signed-off-by: Antoine Tenart &lt;antoine.tenart@bootlin.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>net: mscc: make sparse happy</title>
<updated>2018-06-23T01:42:02+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@bootlin.com</email>
</author>
<published>2018-06-22T09:50:52+00:00</published>
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<id>urn:sha1:c2cd650b5b2bd6b57f2f62be65b1a8a576d4de6d</id>
<content type='text'>
This patch fixes a sparse warning about using an incorrect type in
argument 2 of ocelot_write_rix(), as an u32 was expected but a __be32
was given. The conversion to u32 is forced, which is safe as the value
will be written as-is in the hardware without any modification.

Fixes: 08d02364b12f ("net: mscc: fix the injection header")
Signed-off-by: Antoine Tenart &lt;antoine.tenart@bootlin.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: fix the injection header</title>
<updated>2018-06-21T01:29:46+00:00</updated>
<author>
<name>Antoine Tenart</name>
<email>antoine.tenart@bootlin.com</email>
</author>
<published>2018-06-20T08:50:46+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=08d02364b12faa54d76dbfea2090321fd27996f2'/>
<id>urn:sha1:08d02364b12faa54d76dbfea2090321fd27996f2</id>
<content type='text'>
When injecting frames in the Ocelot switch driver an injection header
(IFH) should be used to configure various parameters related to a given
frame, such as the port onto which the frame should be departed or its
vlan id. Other parameters in the switch configuration can led to an
injected frame being sent without an IFH but this led to various issues
as the per-frame parameters are then not used. This is especially true
when using multiple ports for injection.

The IFH was injected with the wrong endianness which led to the switch
not taking it into account as the IFH_INJ_BYPASS bit was then unset.
(The bit tells the switch to use the IFH over its internal
configuration). This patch fixes it.

In addition to the endianness fix, the IFH is also fixed. As it was
(unwillingly) unused, some of its fields were not configured the right
way.

Fixes: a556c76adc05 ("net: mscc: Add initial Ocelot switch support")
Signed-off-by: Antoine Tenart &lt;antoine.tenart@bootlin.com&gt;
Reviewed-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: ocelot: Fix uninitialized error in ocelot_netdevice_event()</title>
<updated>2018-06-07T20:54:39+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert@linux-m68k.org</email>
</author>
<published>2018-06-07T13:10:30+00:00</published>
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<id>urn:sha1:2ac0e1524d9585f5261cebecca262da6cedc1d85</id>
<content type='text'>
With gcc-4.1.2:

    drivers/net/ethernet/mscc/ocelot.c: In function ‘ocelot_netdevice_event’:
    drivers/net/ethernet/mscc/ocelot.c:1129: warning: ‘ret’ may be used uninitialized in this function

If the list iterated over by netdev_for_each_lower_dev() is empty, ret
is never initialized, and converted into a notifier return value.

Fix this by preinitializing ret to zero.

Fixes: a556c76adc052c97 ("net: mscc: Add initial Ocelot switch support")
Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: Add SPDX identifier</title>
<updated>2018-05-18T15:30:25+00:00</updated>
<author>
<name>Alexandre Belloni</name>
<email>alexandre.belloni@bootlin.com</email>
</author>
<published>2018-05-17T19:23:05+00:00</published>
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<id>urn:sha1:64a2658b58ab519dc17aa3ec5754eedcbdb68bde</id>
<content type='text'>
ocelot_qsys.h is missing the SPDX identfier, fix that.

Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Reviewed-by: Allan W. Nielsen &lt;allan.nielsen@microsemi.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: mscc: Add initial Ocelot switch support</title>
<updated>2018-05-15T20:41:15+00:00</updated>
<author>
<name>Alexandre Belloni</name>
<email>alexandre.belloni@bootlin.com</email>
</author>
<published>2018-05-14T20:04:57+00:00</published>
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<id>urn:sha1:a556c76adc052c979ef9e80f0cd3fa1379ff4943</id>
<content type='text'>
Add a driver for Microsemi Ocelot Ethernet switch support.

This makes two modules:
mscc_ocelot_common handles all the common features that doesn't depend on
how the switch is integrated in the SoC. Currently, it handles offloading
bridging to the hardware. ocelot_io.c handles register accesses. This is
unfortunately needed because the register layout is packed and then depends
on the number of ports available on the switch. The register definition
files are automatically generated.

ocelot_board handles the switch integration on the SoC and on the board.

Frame injection and extraction to/from the CPU port is currently done using
register accesses which is quite slow. DMA is possible but the port is not
able to absorb the whole switch bandwidth.

Signed-off-by: Alexandre Belloni &lt;alexandre.belloni@bootlin.com&gt;
Reviewed-by: Andrew Lunn &lt;andrew@lunn.ch&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
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