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<title>BMC/Intel-BMC/linux.git/drivers/net/ethernet/broadcom, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
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<updated>2016-05-12T03:46:09+00:00</updated>
<entry>
<title>bnxt_en: Add workaround to detect bad opaque in rx completion (part 2)</title>
<updated>2016-05-12T03:46:09+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-05-10T23:18:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fa7e28127a5ad9fd55ac9c7707d8c8b835113a7c'/>
<id>urn:sha1:fa7e28127a5ad9fd55ac9c7707d8c8b835113a7c</id>
<content type='text'>
Add detection and recovery code when the hardware returned opaque value
does not match the expected consumer index.  Once the issue is detected,
we skip the processing of all RX and LRO/GRO packets.  These completion
entries are discarded without sending the SKB to the stack and without
producing new buffers.  The function will be reset from a workqueue.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Add workaround to detect bad opaque in rx completion (part 1)</title>
<updated>2016-05-12T03:46:09+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-05-10T23:17:59+00:00</published>
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<id>urn:sha1:376a5b8647d6c56cb8f104d7ad0390b4f4057e70</id>
<content type='text'>
There is a rare hardware bug that can cause a bad opaque value in the RX
or TPA completion.  When this happens, the hardware may have used the
same buffer twice for 2 rx packets.  In addition, the driver will also
crash later using the bad opaque as the index into the ring.

The rx opaque value is predictable and is always monotonically increasing.
The workaround is to keep track of the expected next opaque value and
compare it with the one returned by hardware during RX and TPA start
completions.  If they miscompare, we will not process any more RX and
TPA completions and exit NAPI.  We will then schedule a workqueue to
reset the function.

This patch adds the logic to keep track of the next rx consumer index.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Setup multicast properly after resetting device.</title>
<updated>2016-05-04T21:11:38+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-05-04T20:56:44+00:00</published>
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<id>urn:sha1:7d2837dd7a3239e8201d9bef75c1a708e451e123</id>
<content type='text'>
The multicast/all-multicast internal flags are not properly restored
after device reset.  This could lead to unreliable multicast operations
after an ethtool configuration change for example.

Call bnxt_mc_list_updated() and setup the vnic-&gt;mask in bnxt_init_chip()
to fix the issue.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Need memory barrier when processing the completion ring.</title>
<updated>2016-05-04T21:11:37+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-05-04T20:56:43+00:00</published>
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<id>urn:sha1:67a95e2022c7f0405408fb1f910283785ece354a</id>
<content type='text'>
The code determines if the next ring entry is valid before proceeding
further to read the rest of the entry.  The CPU can re-order and read
the rest of the entry first, possibly reading a stale entry, if DMA
of a new entry happens right after reading it.  This issue can be
readily seen on a ppc64 system, causing it to crash.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Divide a page into 32K buffers for the aggregation ring if necessary.</title>
<updated>2016-04-27T20:18:45+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-04-25T06:30:51+00:00</published>
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<id>urn:sha1:89d0a06c516339c0a2b3d02677f5d6310b3319fb</id>
<content type='text'>
If PAGE_SIZE is bigger than BNXT_RX_PAGE_SIZE, that means the native CPU
page is bigger than the maximum length of the RX BD.  Divide the page
into multiple 32K buffers for the aggregation ring.

Add an offset field in the bnxt_sw_rx_agg_bd struct to keep track of the
page offset of each buffer.  Since each page can be referenced by multiple
buffer entries, call get_page() as needed to get the proper reference
count.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Limit RX BD pages to be no bigger than 32K.</title>
<updated>2016-04-27T20:18:45+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-04-25T06:30:50+00:00</published>
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<id>urn:sha1:2839f28bd5bf8fd2ab4a1ea3a5589c8f94364cbb</id>
<content type='text'>
The RX BD length field of this device is 16-bit, so the largest buffer
size is 65535.  For LRO and GRO, we allocate native CPU pages for the
aggregation ring buffers.  It won't work if the native CPU page size is
64K or bigger.

We fix this by defining BNXT_RX_PAGE_SIZE to be native CPU page size
up to 32K.  Replace PAGE_SIZE with BNXT_RX_PAGE_SIZE in all appropriate
places related to the rx aggregation ring logic.

The next patch will add additional logic to divide the page into 32K
chunks for aggrgation ring buffers if PAGE_SIZE is bigger than
BNXT_RX_PAGE_SIZE.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bnxt_en: Don't fallback to INTA on VF.</title>
<updated>2016-04-27T20:18:45+00:00</updated>
<author>
<name>Michael Chan</name>
<email>michael.chan@broadcom.com</email>
</author>
<published>2016-04-25T06:30:49+00:00</published>
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<id>urn:sha1:1fa72e29e14d97fbda15437c648d7cc4eb00bff8</id>
<content type='text'>
Only MSI-X can be used on a VF.  The driver should fail initialization
if it cannot successfully enable MSI-X.

Signed-off-by: Michael Chan &lt;michael.chan@broadcom.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>net: bcmgenet: device stats are unsigned long</title>
<updated>2016-04-17T02:03:39+00:00</updated>
<author>
<name>Eric Dumazet</name>
<email>edumazet@google.com</email>
</author>
<published>2016-04-15T17:47:52+00:00</published>
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<id>urn:sha1:6517eb59b03965689e6bb16bb2d480096b3ef95d</id>
<content type='text'>
On 64bit kernels, device stats are 64bit wide, not 32bit.

Fixes: 1c1008c793fa4 ("net: bcmgenet: add main driver file")
Signed-off-by: Eric Dumazet &lt;edumazet@google.com&gt;
Cc: Florian Fainelli &lt;f.fainelli@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bgmac: fix MAC soft-reset bit for corerev &gt; 4</title>
<updated>2016-04-15T01:17:14+00:00</updated>
<author>
<name>Felix Fietkau</name>
<email>nbd@openwrt.org</email>
</author>
<published>2016-04-12T16:27:29+00:00</published>
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<id>urn:sha1:c02bc350f9dbce7d637c394a6e1c4d29dc5b28b2</id>
<content type='text'>
Only core revisions older than 4 use BGMAC_CMDCFG_SR_REV0. This mainly
fixes support for BCM4708A0KF SoCs with Ethernet core rev 5 (it means
only some devices as most of BCM4708A0KF-s got core rev 4).
This was tested for regressions on BCM47094 which doesn't seem to care
which bit gets used.

Signed-off-by: Felix Fietkau &lt;nbd@openwrt.org&gt;
Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
<entry>
<title>bgmac: reset &amp; enable Ethernet core before using it</title>
<updated>2016-04-14T21:15:55+00:00</updated>
<author>
<name>Rafał Miłecki</name>
<email>zajec5@gmail.com</email>
</author>
<published>2016-04-12T11:30:45+00:00</published>
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<id>urn:sha1:b4dfd8e92956b396d3438212bc9a0be6267b8b34</id>
<content type='text'>
This fixes Ethernet on D-Link DIR-885L with BCM47094 SoC. Felix reported
similar fix was needed for his BCM4709 device (Buffalo WXR-1900DHP?).
I tested this for regressions on BCM4706, BCM4708A0 and BCM47081A0.

Cc: Felix Fietkau &lt;nbd@openwrt.org&gt;
Signed-off-by: Rafał Miłecki &lt;zajec5@gmail.com&gt;
Signed-off-by: David S. Miller &lt;davem@davemloft.net&gt;
</content>
</entry>
</feed>
