<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/misc/Makefile, branch dev-5.10-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.10-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.10-intel'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2021-08-02T16:04:00+00:00</updated>
<entry>
<title>Move Aspeed eSPI driver to soc/aspeed tree</title>
<updated>2021-08-02T16:04:00+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-01-14T23:06:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d22bdd68df3dcb7669672fc5ae660e7b4ca22493'/>
<id>urn:sha1:d22bdd68df3dcb7669672fc5ae660e7b4ca22493</id>
<content type='text'>
This commit moves Aspeed eSPI driver from misc to soc/aspeed tree
to make correct probing order for LPC and eSPI driver. Since LPC
runs over eSPI, eSPI driver should be registered ahead of LPC
driver.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>misc: aspeed: Add Aspeed UART routing control driver.</title>
<updated>2021-08-02T16:04:00+00:00</updated>
<author>
<name>Oskar Senft</name>
<email>osk@google.com</email>
</author>
<published>2018-08-08T14:15:05+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6cb4152b8e465b374ca28853170d448fb50ad1d2'/>
<id>urn:sha1:6cb4152b8e465b374ca28853170d448fb50ad1d2</id>
<content type='text'>
This driver adds sysfs files that allow the BMC userspace to configure
how UARTs and physical serial I/O ports are routed.

Tested: Checked correct behavior (both read &amp; write) on TYAN S7106
board by manually changing routing settings and confirming that bits
flow as expected. Tested for UART1 and UART3 as this board doesn't have
the other UARTs wired up in a testable way.

Signed-off-by: Oskar Senft &lt;osk@google.com&gt;
Signed-off-by: Yong Li &lt;yong.b.li@linux.intel.com&gt;
Signed-off-by: Vernon Mauery &lt;vernon.mauery@linux.intel.com&gt;
Signed-off-by: Kuiying Wang &lt;kuiying.wang@intel.com&gt;
</content>
</entry>
<entry>
<title>Add AST2500 eSPI driver</title>
<updated>2021-08-02T16:04:00+00:00</updated>
<author>
<name>Haiyue Wang</name>
<email>haiyue.wang@linux.intel.com</email>
</author>
<published>2018-02-24T03:12:32+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=2f6e12fc8c51609139d6dfdadcc63dabd0abde80'/>
<id>urn:sha1:2f6e12fc8c51609139d6dfdadcc63dabd0abde80</id>
<content type='text'>
When PCH works under eSPI mode, the PMC (Power Management Controller) in
PCH is waiting for SUS_ACK from BMC after it alerts SUS_WARN. It is in
dead loop if no SUS_ACK assert. This is the basic requirement for the BMC
works as eSPI slave.

Also for the host power on / off actions, from BMC side, the following VW
(Virtual Wire) messages are done in firmware:
1. SLAVE_BOOT_LOAD_DONE / SLAVE_BOOT_LOAD_STATUS
2. SUS_ACK
3. OOB_RESET_ACK
4. HOST_RESET_ACK

Also, it provides monitoring interface of PLTRST_N signal through
/dev/espi-pltrstn

Signed-off-by: Haiyue Wang &lt;haiyue.wang@linux.intel.com&gt;
Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Signed-off-by: James Feist &lt;james.feist@linux.intel.com&gt;
Signed-off-by: Vernon Mauery &lt;vernon.mauery@intel.com&gt;
</content>
</entry>
<entry>
<title>misc: Remove obsolete mctp-lpc chardev</title>
<updated>2021-06-24T09:23:28+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2021-06-23T03:38:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0455fc0eefecd58c93b8fcdd208761c40c0d26ab'/>
<id>urn:sha1:0455fc0eefecd58c93b8fcdd208761c40c0d26ab</id>
<content type='text'>
The mctp-lpc chardev is replaced (temporarily) by the raw KCS chardev.
The raw chardev is required for IBM's purposes until Jeremy's
socket-based MCTP patches are merged[1][2].

[1] https://github.com/openbmc/docs/blob/master/designs/mctp/mctp-kernel.md
[2] https://lore.kernel.org/openbmc/f4f5fa66542401e8d5e78c1fb30153195d384b62.camel@codeconstruct.com.au/

OpenBMC-Staging-Count: 1
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Link: https://lore.kernel.org/r/20210623033854.587464-6-andrew@aj.id.au
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>misc: Add NPCM7xx JTAG master driver</title>
<updated>2021-02-09T01:06:11+00:00</updated>
<author>
<name>Tomer Maimon</name>
<email>tmaimon77@gmail.com</email>
</author>
<published>2021-01-13T20:00:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c94d4d68bf956e7b141bf1dcb95cbe6e34b50cc0'/>
<id>urn:sha1:c94d4d68bf956e7b141bf1dcb95cbe6e34b50cc0</id>
<content type='text'>
The NPCM7xx JTAG master using GPIO lines and NPCM PSPI bus.

OpenBMC-Staging-Count: 2
Signed-off-by: Stanley Chu &lt;yschu@nuvoton.com&gt;
Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Link: https://lore.kernel.org/r/20210113200010.71845-13-tmaimon77@gmail.com
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>misc: Add ASPEED KCS driver for MCTP purposes</title>
<updated>2021-02-09T01:06:08+00:00</updated>
<author>
<name>Andrew Jeffery</name>
<email>andrew@aj.id.au</email>
</author>
<published>2020-03-27T06:31:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=93c66ac22f856b8bd3718bc26bae3f919a4dd627'/>
<id>urn:sha1:93c66ac22f856b8bd3718bc26bae3f919a4dd627</id>
<content type='text'>
IBM have developed a vendor-defined MCTP binding that utilises LPC IO
and FW interfaces to exchange MCTP messages. A KCS device in the IO
space is used to send single-byte control messages initialising the MCTP
channel and exchanging ownership of data buffers.

This driver exposes the KCS message stream to userspace, allowing an
MCTP-capable application to manipulate the data exposed via the FW
space.

OpenBMC-Staging-Count: 4
Signed-off-by: Andrew Jeffery &lt;andrew@aj.id.au&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>misc: mbox: add npcm7xx pci mailbox driver</title>
<updated>2021-02-09T00:52:19+00:00</updated>
<author>
<name>Tomer Maimon</name>
<email>tmaimon77@gmail.com</email>
</author>
<published>2019-01-14T13:07:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=869c918f44028fea257f59bc6c5f7179fe8bee9d'/>
<id>urn:sha1:869c918f44028fea257f59bc6c5f7179fe8bee9d</id>
<content type='text'>
Add Nuvoton BMC NPCM7XX PCI Mailbox driver.

OpenBMC-Staging-Count: 9
Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
[v5.0: Fix access_ok for API change]
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>misc: npcm7xx-lpc-bpc: add NPCM7xx BIOS post code driver</title>
<updated>2021-02-09T00:52:19+00:00</updated>
<author>
<name>Tomer Maimon</name>
<email>tmaimon77@gmail.com</email>
</author>
<published>2019-01-14T13:07:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c3fb7e9f33d1f2ac9ce9e914218934f08e6d1445'/>
<id>urn:sha1:c3fb7e9f33d1f2ac9ce9e914218934f08e6d1445</id>
<content type='text'>
Add NPCM7xx BIOS post code (BPC) driver,
the BPC monitoring two I/O address written
by the host on the LPC.

OpenBMC-Staging-Count: 9
Signed-off-by: Tomer Maimon &lt;tmaimon77@gmail.com&gt;
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>misc: mic: remove the MIC drivers</title>
<updated>2020-10-28T18:12:03+00:00</updated>
<author>
<name>Sudeep Dutt</name>
<email>sudeep.dutt@intel.com</email>
</author>
<published>2020-10-28T03:14:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=80ade22c06ca115b81dd168e99479c8e09843513'/>
<id>urn:sha1:80ade22c06ca115b81dd168e99479c8e09843513</id>
<content type='text'>
This patch removes the MIC drivers from the kernel tree
since the corresponding devices have been discontinued.

Removing the dma and char-misc changes in one patch and
merging via the char-misc tree is best to avoid any
potential build breakage.

Cc: Nikhil Rao &lt;nikhil.rao@intel.com&gt;
Reviewed-by: Ashutosh Dixit &lt;ashutosh.dixit@intel.com&gt;
Signed-off-by: Sudeep Dutt &lt;sudeep.dutt@intel.com&gt;
Acked-By: Vinod Koul &lt;vkoul@kernel.org&gt;
Reviewed-by: Sherry Sun &lt;sherry.sun@nxp.com&gt;
Link: https://lore.kernel.org/r/8c1443136563de34699d2c084df478181c205db4.1603854416.git.sudeep.dutt@intel.com
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>misc: hisi_hikey_usb: Driver to support onboard USB gpio hub on Hikey960</title>
<updated>2020-09-10T16:56:38+00:00</updated>
<author>
<name>Yu Chen</name>
<email>chenyu56@huawei.com</email>
</author>
<published>2020-09-10T06:00:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7a6ff4c4cbc3570a1ae483a833b3fb12b1a56a9d'/>
<id>urn:sha1:7a6ff4c4cbc3570a1ae483a833b3fb12b1a56a9d</id>
<content type='text'>
The HiKey960 has a fairly complex USB configuration due to it
needing to support a USB-C port for host/device mode and multiple
USB-A ports in host mode, all using a single USB controller.

See schematics here:
  https://github.com/96boards/documentation/raw/master/consumer/hikey/hikey960/hardware-docs/HiKey960_Schematics.pdf

This driver acts as a usb-role-switch intermediary, intercepting
the role switch notifications from the tcpm code, and passing
them on to the dwc3 core.

In doing so, it also controls the onboard hub and power gpios in
order to properly route the data lines between the USB-C port
and the onboard hub to the USB-A ports.

Signed-off-by: Yu Chen &lt;chenyu56@huawei.com&gt;
[jstultz: Major rework to make the driver a usb-role-switch
          intermediary]
Signed-off-by: John Stultz &lt;john.stultz@linaro.org&gt;
Signed-off-by: Mauro Carvalho Chehab &lt;mchehab+huawei@kernel.org&gt;
Link: https://lore.kernel.org/r/c263f72e1d803c18c45a69ce2c333e79a7ed89ff.1599717402.git.mchehab+huawei@kernel.org
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
</feed>
