BMC/Intel-BMC/linux.git/drivers/misc/Kconfig, branch dev-4.7

drivers/misc: Add Aspeed LPC control driver

2017-01-16T00:19:03+00:00

In order to manage server systems, there is typically another processor known as a BMC (Baseboard Management Controller) which is responsible for powering the server and other various elements, sometimes fans, often the system flash. The Aspeed BMC family which is what is used on OpenPOWER machines and a number of x86 as well is typically connected to the host via an LPC (Low Pin Count) bus (among others). The LPC bus is an ISA bus on steroids. It's generally used by the BMC chip to provide the host with access to the system flash (via MEM/FW cycles) that contains the BIOS or other host firmware along with a number of SuperIO-style IOs (via IO space) such as UARTs, IPMI controllers. On the BMC chip side, this is all configured via a bunch of registers whose content is related to a given policy of what devices are exposed at a per system level, which is system/vendor specific, so we don't want to bolt that into the BMC kernel. This started with a need to provide something nicer than /dev/mem for user space to configure these things. One important aspect of the configuration is how the MEM/FW space is exposed to the host (ie, the x86 or POWER). Some registers in that bridge can define a window remapping all or portion of the LPC MEM/FW space to a portion of the BMC internal bus, with no specific limits imposed in HW. I think it makes sense to ensure that this window is configured by a kernel driver that can apply some serious sanity checks on what it is configured to map. In practice, user space wants to control this by flipping the mapping between essentially two types of portions of the BMC address space: - The flash space. This is a region of the BMC MMIO space that more/less directly maps the system flash (at least for reads, writes are somewhat more complicated). - One (or more) reserved area(s) of the BMC physical memory. The latter is needed for a number of things, such as avoiding letting the host manipulate the innards of the BMC flash controller via some evil backdoor, we want to do flash updates by routing the window to a portion of memory (under control of a mailbox protocol via some separate set of registers) which the host can use to write new data in bulk and then request the BMC to flash it. There are other uses, such as allowing the host to boot from an in-memory flash image rather than the one in flash (very handy for continuous integration and test, the BMC can just download new images). It is important to note that due to the way the ASpeed chip lets the kernel configure the mapping between host LPC addresses and BMC ram addresses the offset within the window must be a multiple of size. Not doing so will fragment the accessible space rather than simply moving 'zero' upwards. This is caused by the nature of HICR8 being a mask and the way host LPC addresses are translated. Signed-off-by: Cyril Bur [joel: Apply v3 from http://patchwork.ozlabs.org/patch/715545/ with small fixes] Signed-off-by: Joel Stanley

Revert "misc: Add Aspeed BT IPMI host driver"

2016-11-10T11:31:13+00:00

This reverts commit f7b4775fdf656f00f1b692bf3db97b3a8088c057. Signed-off-by: Cédric Le Goater Signed-off-by: Joel Stanley

misc: Add Aspeed BT IPMI host driver

2016-08-09T06:22:16+00:00

This patch adds a simple device driver to expose the iBT interface on Aspeed chips as a character device (/dev/bt). The iBT interface is used to perform in-band IPMI communication from a BMC to the host. Signed-off-by: Alistair Popple Signed-off-by: Jeremy Kerr Signed-off-by: Joel Stanley

Merge char-misc-next into staging-next

2016-02-22T22:46:24+00:00

This resolves the merge issues and confusions people were having with the goldfish drivers due to changes for them showing up in two different trees. Signed-off-by: Greg Kroah-Hartman

misc/bmp085: Enable building as a module

2016-02-08T07:01:45+00:00

Commit 985087dbcb02 'misc: add support for bmp18x chips to the bmp085 driver' changed the BMP085 config symbol to a boolean. I see no reason why the shared code cannot be built as a module, so change it back to tristate. Fixes: 985087dbcb02 ("misc: add support for bmp18x chips to the bmp085 driver") Cc: Eric Andersson Signed-off-by: Ben Hutchings Acked-by: Arnd Bergmann Signed-off-by: Greg Kroah-Hartman

misc: pch_phub: allow build on MIPS platforms

2016-02-08T07:01:45+00:00

Allow the pch_phub driver to be build on MIPS platforms, in preparation for its use on the MIPS Boston board. Signed-off-by: Paul Burton Signed-off-by: Greg Kroah-Hartman

misc: Move panel driver out of staging

2016-02-03T22:14:22+00:00

Move panel driver from drivers/staging/panel to drivers/misc. Signed-off-by: Ksenija Stanojevic Acked-by: Willy Tarreau Signed-off-by: Greg Kroah-Hartman

misc: ibmasm: fix build errors

2016-01-21T01:09:18+00:00

Fix build when CONFIG_SERIAL_8250=m and CONFIG_IBM_ASM=y. Fixes these build errors: drivers/built-in.o: In function `ibmasm_remove_one': module.c:(.text+0xf6874): undefined reference to `ibmasm_unregister_uart' drivers/built-in.o: In function `ibmasm_init_one': module.c:(.text+0xf6c37): undefined reference to `ibmasm_register_uart' Signed-off-by: Randy Dunlap Cc: Max Asbock Cc: Vernon Mauery Signed-off-by: Andrew Morton Signed-off-by: Linus Torvalds

VMware balloon: Enable notification via VMCI

2015-10-04T11:59:11+00:00

Get notified immediately when a balloon target is set, instead of waiting for up to one second. The up-to 1 second gap could be long enough to cause swapping inside of the VM that receives the VM. Acked-by: Andy King Signed-off-by: Xavier Deguillard Tested-by: Siva Sankar Reddy B Signed-off-by: Greg Kroah-Hartman

ARM: qcom: Add coincell charger driver

2015-07-29T20:37:18+00:00

This driver is used to configure the coincell charger found in Qualcomm PMICs. The driver allows configuring the current-limiting resistor for the charger, as well as the voltage to apply to the coincell (or capacitor) when charging. Signed-off-by: Tim Bird Reviewed-by: Andy Gross Signed-off-by: Greg Kroah-Hartman