BMC/Intel-BMC/linux.git/drivers/memory/tegra/tegra210.c, branch dev-4.17Intel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.172018-08-03T05:47:58+00:00memory: tegra: Apply interrupts mask per SoC2018-08-03T05:47:58+00:00Dmitry Osipenkodigetx@gmail.com2018-04-09T19:28:29+00:00urn:sha1:bce56f0cb64a1e0a461e1aba39c666958d5aaa40
[ Upstream commit 1c74d5c0de0c2cc29fef97a19251da2ad6f579bd ]
Currently we are enabling handling of interrupts specific to Tegra124+
which happen to overlap with previous generations. Let's specify
interrupts mask per SoC generation for consistency and in a preparation
of squashing of Tegra20 driver into the common one that will enable
handling of GART faults which may be undesirable by newer generations.
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <alexander.levin@microsoft.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
memory: tegra: Create SMMU display groups2017-12-15T09:12:32+00:00Thierry Redingtreding@nvidia.com2017-10-12T14:29:19+00:00urn:sha1:2a8102dfe0da7dbb61794e6b85dc7ac9271e5fc8
Create SMMU display groups for Tegra30, Tegra114, Tegra124 and Tegra210.
This allows the display controllers on these devices to share the same
IOMMU domain using the standard IOMMU group mechanism.
Signed-off-by: Thierry Reding <treding@nvidia.com>
memory: tegra: Add Tegra210 support2015-08-13T14:07:52+00:00Thierry Redingtreding@nvidia.com2015-03-23T09:45:12+00:00urn:sha1:588c43a7bd5a53ae523b318e1db16bdd59963a3c
Add the table of memory clients and SWGROUPs for Tegra210 to enable SMMU
support for this new SoC.
Signed-off-by: Thierry Reding <treding@nvidia.com>