<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/i3c, branch dev-5.15-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.15-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.15-intel'/>
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<updated>2022-06-10T07:22:16+00:00</updated>
<entry>
<title>i3c: mctp: Add GETMWL/SETMWL and GETMRL/SETMRL support</title>
<updated>2022-06-10T07:22:16+00:00</updated>
<author>
<name>Oleksandr Shulzhenko</name>
<email>oleksandr.shulzhenko.viktorovych@intel.com</email>
</author>
<published>2022-04-28T09:46:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7c1de25c06f31b04744beae891baf147af9ba0cb'/>
<id>urn:sha1:7c1de25c06f31b04744beae891baf147af9ba0cb</id>
<content type='text'>
We need to set MRL/MWL to 69: 64 byte MCTP payload + 4 byte MCTP header
+ 1 byte PEC as per MCTP o. I3C spec paragraph 5.4.2.
We also need to verify whether MCTP packet size meets the requirement and
throw the error otherwise.

Signed-off-by: Oleksandr Shulzhenko &lt;oleksandr.shulzhenko.viktorovych@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: device: Add SETMWL/GETMWL and SETMRL/GETMRL support</title>
<updated>2022-06-10T07:22:16+00:00</updated>
<author>
<name>Oleksandr Shulzhenko</name>
<email>oleksandr.shulzhenko.viktorovych@intel.com</email>
</author>
<published>2022-04-28T08:09:07+00:00</published>
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<id>urn:sha1:2c31bcfb671c1fbb98874908b41f633b83bbab14</id>
<content type='text'>
Add the GETMRL/SETMRL and GETMWL/SETMWL CCC commands functions.
The functions are needed to configure maximum read/write length
for the specific I3C device.

Signed-off-by: Oleksandr Shulzhenko &lt;oleksandr.shulzhenko.viktorovych@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Add PECI-related functionality to I3C MCTP driver</title>
<updated>2022-06-01T08:46:09+00:00</updated>
<author>
<name>Oleksandr Shulzhenko</name>
<email>oleksandr.shulzhenko.viktorovych@intel.com</email>
</author>
<published>2022-05-20T12:52:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e0e3e2a1c66c03c5cf77afedbac829d31ca06ec0'/>
<id>urn:sha1:e0e3e2a1c66c03c5cf77afedbac829d31ca06ec0</id>
<content type='text'>
 - Handler for PECI messages have been added;
 - i3c_mctp_client and platform_device for PECI have been added.

Signed-off-by: Oleksandr Shulzhenko &lt;oleksandr.shulzhenko.viktorovych@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Extend MCTP o. I3C driver with the TX/RX functions</title>
<updated>2022-06-01T08:46:09+00:00</updated>
<author>
<name>Oleksandr Shulzhenko</name>
<email>oleksandr.shulzhenko.viktorovych@intel.com</email>
</author>
<published>2022-05-10T15:27:02+00:00</published>
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<id>urn:sha1:426a368a8790b0561ef81bbd076fcc9c5e7e5ac1</id>
<content type='text'>
Extend the driver with the functionality necessary to send
and receive MCTP over I3C packets by another component in kernel:
- i3c_mctp_client concept needed to implement packet queue so that
  the driver can manage and classify packets for several clients
  respectively;
- the function that provides MCTP target EID;
- the functions to alloc and free mctp_i3c_packet;
- the functions to send and receive MCTP packets over I3C.

Signed-off-by: Oleksandr Shulzhenko &lt;oleksandr.shulzhenko.viktorovych@intel.com&gt;
</content>
</entry>
<entry>
<title>Revert "i3c: mctp: Replace redundant MKDEV calls"</title>
<updated>2022-05-27T13:21:19+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2022-05-27T00:11:36+00:00</published>
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<id>urn:sha1:1dbcc6ae7d8642d7835bf6a411060e0b9677c905</id>
<content type='text'>
This reverts commit 825fd72c22d729a4ad0d4d3ee488525710fe9877.
Minor was passed as one of the arguments - it was not redundant and
removing it introduces a regression.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Add I3C Target MCTP driver</title>
<updated>2022-05-25T11:23:21+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2022-04-28T21:23:49+00:00</published>
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<id>urn:sha1:4bd315b6e6cecd81d76e6922459c45e9e452f38b</id>
<content type='text'>
Add a simple device driver that implements necessary system calls to
support userspace MCTP communication when I3C HW is configured as I3C
Target.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Replace redundant MKDEV calls</title>
<updated>2022-05-25T11:23:21+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2022-05-03T17:43:02+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=825fd72c22d729a4ad0d4d3ee488525710fe9877'/>
<id>urn:sha1:825fd72c22d729a4ad0d4d3ee488525710fe9877</id>
<content type='text'>
Since alloc_chrdev_region() returns devt as an output parameter, calling
MKDEV() on it is a no-op.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Use ID instead of I3C devname in chardev name</title>
<updated>2022-05-25T11:23:21+00:00</updated>
<author>
<name>Iwona Winiarska</name>
<email>iwona.winiarska@intel.com</email>
</author>
<published>2022-05-02T22:58:43+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=52ac8c5e80f2406265fd09cbfe0599b56fe5bb27'/>
<id>urn:sha1:52ac8c5e80f2406265fd09cbfe0599b56fe5bb27</id>
<content type='text'>
Using I3C device name in char device name makes it longer.
There is no need to keep information about I3C device in name, since we
have access to this information via sysfs.

Signed-off-by: Iwona Winiarska &lt;iwona.winiarska@intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: mctp: Enable PEC</title>
<updated>2022-05-20T11:49:59+00:00</updated>
<author>
<name>Zbigniew Lukwinski</name>
<email>zbigniew.lukwinski@linux.intel.com</email>
</author>
<published>2022-05-10T22:48:38+00:00</published>
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<id>urn:sha1:5011eeadb7d5a14d8bf178c9032c2ab27b38ed4c</id>
<content type='text'>
Following DMTF DSP0233 standard, MCTP over I3C requires PEC generation
and validation for private read and write SDR transfers. To enable PEC,
I3C driver PEC support is used.

Signed-off-by: Zbigniew Lukwinski &lt;zbigniew.lukwinski@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>i3c: dw: master: Enable PEC support in hardware</title>
<updated>2022-05-20T11:49:59+00:00</updated>
<author>
<name>Zbigniew Lukwinski</name>
<email>zbigniew.lukwinski@linux.intel.com</email>
</author>
<published>2022-05-10T22:47:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=ab986eaa298cbc5ef8af58cc44f947b2620699e4'/>
<id>urn:sha1:ab986eaa298cbc5ef8af58cc44f947b2620699e4</id>
<content type='text'>
DWC MIPI I3C Controller supports automatic PEC generation and
validation for private write and read SDR transfers. This feature
could be used for upper layers, e.g. MCTP over I3C to offload PEC
handling to the hardware.
PEC supported by DWC MIPI I3C Controller is described in JESD403-1.

Signed-off-by: Zbigniew Lukwinski &lt;zbigniew.lukwinski@linux.intel.com&gt;
</content>
</entry>
</feed>
