BMC/Intel-BMC/linux.git/drivers/hwmon, branch dev-4.17

Merge tag 'v4.17.4' into dev-4.17

2018-07-05T01:41:27+00:00

This is the 4.17.4 stable release Signed-off-by: Joel Stanley

hwmon: (k10temp) Add support for Stoney Ridge and Bristol Ridge CPUs

2018-07-03T09:26:46+00:00

commit ccaf63b4d6eaf3447037cefbb0b1038fa80c6639 upstream. Add support for Stoney Ridge and Bristol Ridge (Family 15h Model 0x70) CPUs. Registers match those of Family 15h Model 0x60. Cc: stable@vger.kernel.org # v4.16+ Tested-by: Gabriel Craciunescu Signed-off-by: Guenter Roeck Signed-off-by: Greg Kroah-Hartman

hwmon: Add On-Chip Controller (OCC) hwmon driver

2018-06-19T03:05:38+00:00

The OCC is a device embedded on a POWER processor that collects and aggregates sensor data from the processor and system. The OCC can provide the raw sensor data as well as perform thermal and power management on the system. This driver provides a hwmon interface to the OCC from a service processor (e.g. a BMC). The driver supports both POWER8 and POWER9 OCCs. Communications with the POWER8 OCC are established over standard I2C bus. The driver communicates with the POWER9 OCC through the FSI-based OCC driver, which handles the lower-level communication details. OpenBMC-Staging-Count: 3 Signed-off-by: Edward A. James Signed-off-by: Benjamin Herrenschmidt Signed-off-by: Joel Stanley

pmbus (max31785): Wrap all I2C accessors in one-shot failure handlers

2018-06-19T03:05:38+00:00

The MAX31785(A) has shown erratic behaviour across multiple system designs, unexpectedly clock stretching and NAKing transactions. Perform a one-shot retry if necessary for all access attempts. OpenBMC-Staging-Count: 3 Signed-off-by: Andrew Jeffery Tested-by: George Keishing

pmbus (core): Use driver callbacks in pmbus_get_fan_rate()

2018-06-19T03:05:38+00:00

The driver may have overridden the pmbus_read_byte_data() callback, so make sure we use that to achieve expected behaviour. This helps in the MAX31785 case where we may need to perform a one-shot retry of transfers in the face of a failure. OpenBMC-Staging-Count: 3 Signed-off-by: Andrew Jeffery Reviewed-by: Eddie James Tested-by: George Keishing

pmbus (core): One-shot retries for failure to set page

2018-06-19T03:05:38+00:00

Work around the shonky behaviour seen with the MAX31785 where we fail to set the page register in some circumstances. There's no real elegant way to do this. We can propagate the error up, but that forces us to retry the operation way up the call tree in any number of places. It also forces callers to split out pmbus_set_page() from the pmbus_{read,write}_{byte,word}_data() functions in order to differentiate between a failure to set the page and a failure to read a register (that might not exist, in which case an error is anticiptated). OpenBMC-Staging-Count: 3 Cc: Eddie James Cc: Matt Spinler Signed-off-by: Andrew Jeffery Reviewed-by: Eddie James Tested-by: George Keishing

pmbus (max31785): Add support for devicetree configuration

2018-06-19T03:05:38+00:00

OpenBMC-Staging-Count: 3 Signed-off-by: Andrew Jeffery Tested-by: George Keishing

hwmon: (k10temp) Use API function to access System Management Network

2018-05-13T16:00:49+00:00

The SMN (System Management Network) on Family 17h AMD CPUs is also accessed from other drivers, specifically EDAC. Accessing it directly is racy. On top of that, accessing the SMN through root bridge 00:00 is wrong on multi-die CPUs and may result in reading the temperature from the wrong die. Use available API functions to fix the problem. For this to work, add dependency on AMD_NB. Also change the Raven Ridge PCI device ID to point to Data Fabric Function 3, since this ID is used by the API functions to find the CPU node. Cc: stable@vger.kernel.org # v4.16+ Tested-by: Gabriel Craciunescu Signed-off-by: Guenter Roeck

hwmon: (k10temp) Fix reading critical temperature register

2018-04-29T21:21:45+00:00

The HTC (Hardware Temperature Control) register has moved for recent chips. Cc: stable@vger.kernel.org # v4.16+ Tested-by: Gabriel Craciunescu Signed-off-by: Guenter Roeck

hwmon: (k10temp) Add support for AMD Ryzen w/ Vega graphics

2018-04-25T12:31:06+00:00

Enable k10temp for AMD Ryzen APUs w/ Vega Mobile Gfx. Based on patch from René Rebe . Dropped temperature offsets since those are not supposed to apply for the affected CPUs. Cc: stable@vger.kernel.org # v4.16+ Cc: René Rebe Signed-off-by: Guenter Roeck