<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/gpu/drm/i915/intel_ringbuffer.h, branch dev-4.10</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-11-14T21:01:21+00:00</updated>
<entry>
<title>drm/i915/scheduler: Execute requests in order of priorities</title>
<updated>2016-11-14T21:01:21+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-11-14T20:41:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=20311bd35060435badba8a0d46b06d5d184abaf7'/>
<id>urn:sha1:20311bd35060435badba8a0d46b06d5d184abaf7</id>
<content type='text'>
Track the priority of each request and use it to determine the order in
which we submit requests to the hardware via execlists.

The priority of the request is determined by the user (eventually via
the context) but may be overridden at any time by the driver. When we set
the priority of the request, we bump the priority of all of its
dependencies to match - so that a high priority drawing operation is not
stuck behind a background task.

When the request is ready to execute (i.e. we have signaled the submit
fence following completion of all its dependencies, including third
party fences), we put the request into a priority sorted rbtree to be
submitted to the hardware. If the request is higher priority than all
pending requests, it will be submitted on the next context-switch
interrupt as soon as the hardware has completed the current request. We
do not currently preempt any current execution to immediately run a very
high priority request, at least not yet.

One more limitation, is that this is first implementation is for
execlists only so currently limited to gen8/gen9.

v2: Replace recursive priority inheritance bumping with an iterative
depth-first search list.
v3: list_next_entry() for walking lists
v4: Explain how the dfs solves the recursion problem with PI.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161114204105.29171-8-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915/scheduler: Signal the arrival of a new request</title>
<updated>2016-11-14T21:00:26+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-11-14T20:41:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0de9136dbbc9f6882bb375270eaddf1b999081bf'/>
<id>urn:sha1:0de9136dbbc9f6882bb375270eaddf1b999081bf</id>
<content type='text'>
The start of the scheduler, add a hook into request submission for the
scheduler to see the arrival of new requests and prepare its runqueues.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161114204105.29171-6-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Remove engine-&gt;execlist_lock</title>
<updated>2016-11-14T21:00:25+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-11-14T20:41:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=663f71e73ffd16327745f752269f5059bf196464'/>
<id>urn:sha1:663f71e73ffd16327745f752269f5059bf196464</id>
<content type='text'>
The execlist_lock is now completely subsumed by the engine-&gt;timeline-&gt;lock,
and so we can remove the redundant layer of locking.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161114204105.29171-5-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Spin until breadcrumb threads are complete</title>
<updated>2016-11-09T15:01:52+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-11-08T14:37:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6a5d1db98ef1da5c632640133898aa42d6916c6c'/>
<id>urn:sha1:6a5d1db98ef1da5c632640133898aa42d6916c6c</id>
<content type='text'>
When we need to reset the global seqno on wraparound, we have to wait
until the current rbtrees are drained (or otherwise the next waiter will
be out of sequence). The current mechanism to kick and spin until
complete, may exit too early as it would break if the target thread was
currently running. Instead, we must wake up the threads, but keep
spinning until the trees have been deleted.

In order to appease Tvrtko, busy spin rather than yield().

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161108143719.32215-1-chris@chris-wilson.co.uk
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
</content>
</entry>
<entry>
<title>drm/i915: Avoid accessing request-&gt;timeline outside of its lifetime</title>
<updated>2016-11-01T10:48:40+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-11-01T10:03:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cb399eabc41ae0e67fe87fbebee4cb03ab1b5de9'/>
<id>urn:sha1:cb399eabc41ae0e67fe87fbebee4cb03ab1b5de9</id>
<content type='text'>
Whilst waiting on a request, we may do so without holding any locks or
any guards beyond a reference to the request. In order to avoid taking
locks within request deallocation, we drop references to its timeline
(via the context and ppgtt) upon retirement. We should avoid chasing
such pointers outside of their control, in particular we inspect the
request-&gt;timeline to see if we may restore the RPS waitboost for a
client. If we instead look at the engine-&gt;timeline, we will have similar
behaviour on both full-ppgtt and !full-ppgtt systems and reduce the
amount of reward we give towards stalling clients (i.e. only if the
client stalls and the GPU is uncontended does it reclaim its boost).
This restores behaviour back to pre-timelines, whilst fixing:

[  645.078485] BUG: KASAN: use-after-free in i915_gem_object_wait_fence+0x1ee/0x2e0 at addr ffff8802335643a0
[  645.078577] Read of size 4 by task gem_exec_schedu/28408
[  645.078638] CPU: 1 PID: 28408 Comm: gem_exec_schedu Not tainted 4.9.0-rc2+ #64
[  645.078724] Hardware name:                  /        , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
[  645.078816]  ffff88022daef9a0 ffffffff8143d059 ffff880235402a80 ffff880233564200
[  645.078998]  ffff88022daef9c8 ffffffff81229c5c ffff88022daefa48 ffff880233564200
[  645.079172]  ffff880235402a80 ffff88022daefa38 ffffffff81229ef0 000000008110a796
[  645.079345] Call Trace:
[  645.079404]  [&lt;ffffffff8143d059&gt;] dump_stack+0x68/0x9f
[  645.079467]  [&lt;ffffffff81229c5c&gt;] kasan_object_err+0x1c/0x70
[  645.079534]  [&lt;ffffffff81229ef0&gt;] kasan_report_error+0x1f0/0x4b0
[  645.079601]  [&lt;ffffffff8122a244&gt;] kasan_report+0x34/0x40
[  645.079676]  [&lt;ffffffff81634f5e&gt;] ? i915_gem_object_wait_fence+0x1ee/0x2e0
[  645.079741]  [&lt;ffffffff81229951&gt;] __asan_load4+0x61/0x80
[  645.079807]  [&lt;ffffffff81634f5e&gt;] i915_gem_object_wait_fence+0x1ee/0x2e0
[  645.079876]  [&lt;ffffffff816364bf&gt;] i915_gem_object_wait+0x19f/0x590
[  645.079944]  [&lt;ffffffff81636320&gt;] ? i915_gem_object_wait_priority+0x500/0x500
[  645.080016]  [&lt;ffffffff8110fb30&gt;] ? debug_show_all_locks+0x1e0/0x1e0
[  645.080084]  [&lt;ffffffff8110abdc&gt;] ? check_chain_key+0x14c/0x210
[  645.080157]  [&lt;ffffffff8110a796&gt;] ? __lock_is_held+0x46/0xc0
[  645.080226]  [&lt;ffffffff8163bc61&gt;] ? i915_gem_set_domain_ioctl+0x141/0x690
[  645.080296]  [&lt;ffffffff8163bcc2&gt;] i915_gem_set_domain_ioctl+0x1a2/0x690
[  645.080366]  [&lt;ffffffff811f8f85&gt;] ? __might_fault+0x75/0xe0
[  645.080433]  [&lt;ffffffff815a55f7&gt;] drm_ioctl+0x327/0x640
[  645.080508]  [&lt;ffffffff8163bb20&gt;] ? i915_gem_obj_prepare_shmem_write+0x3a0/0x3a0
[  645.080603]  [&lt;ffffffff815a52d0&gt;] ? drm_ioctl_permit+0x120/0x120
[  645.080670]  [&lt;ffffffff8110abdc&gt;] ? check_chain_key+0x14c/0x210
[  645.080738]  [&lt;ffffffff81275717&gt;] do_vfs_ioctl+0x127/0xa20
[  645.080804]  [&lt;ffffffff8120268c&gt;] ? do_mmap+0x47c/0x580
[  645.080871]  [&lt;ffffffff811da567&gt;] ? vm_mmap_pgoff+0x117/0x140
[  645.080938]  [&lt;ffffffff812755f0&gt;] ? ioctl_preallocate+0x150/0x150
[  645.081011]  [&lt;ffffffff81108c53&gt;] ? up_write+0x23/0x50
[  645.081078]  [&lt;ffffffff811da567&gt;] ? vm_mmap_pgoff+0x117/0x140
[  645.081145]  [&lt;ffffffff811da450&gt;] ? vma_is_stack_for_current+0x90/0x90
[  645.081214]  [&lt;ffffffff8110d853&gt;] ? mark_held_locks+0x23/0xc0
[  645.082030]  [&lt;ffffffff81288408&gt;] ? __fget+0x168/0x250
[  645.082106]  [&lt;ffffffff819ad517&gt;] ? entry_SYSCALL_64_fastpath+0x5/0xb1
[  645.082176]  [&lt;ffffffff81288592&gt;] ? __fget_light+0xa2/0xc0
[  645.082242]  [&lt;ffffffff8127604c&gt;] SyS_ioctl+0x3c/0x70
[  645.082309]  [&lt;ffffffff819ad52e&gt;] entry_SYSCALL_64_fastpath+0x1c/0xb1
[  645.082374] Object at ffff880233564200, in cache kmalloc-8192 size: 8192
[  645.082431] Allocated:
[  645.082480] PID = 28408
[  645.082535]  [  645.082566] [&lt;ffffffff8103ae66&gt;] save_stack_trace+0x16/0x20
[  645.082623]  [  645.082656] [&lt;ffffffff81228b06&gt;] save_stack+0x46/0xd0
[  645.082716]  [  645.082756] [&lt;ffffffff812292fd&gt;] kasan_kmalloc+0xad/0xe0
[  645.082817]  [  645.082848] [&lt;ffffffff81631752&gt;] i915_ppgtt_create+0x52/0x220
[  645.082908]  [  645.082941] [&lt;ffffffff8161db96&gt;] i915_gem_create_context+0x396/0x560
[  645.083027]  [  645.083059] [&lt;ffffffff8161f857&gt;] i915_gem_context_create_ioctl+0x97/0xf0
[  645.083152]  [  645.083183] [&lt;ffffffff815a55f7&gt;] drm_ioctl+0x327/0x640
[  645.083243]  [  645.083274] [&lt;ffffffff81275717&gt;] do_vfs_ioctl+0x127/0xa20
[  645.083334]  [  645.083372] [&lt;ffffffff8127604c&gt;] SyS_ioctl+0x3c/0x70
[  645.083432]  [  645.083464] [&lt;ffffffff819ad52e&gt;] entry_SYSCALL_64_fastpath+0x1c/0xb1
[  645.083551] Freed:
[  645.083599] PID = 27629
[  645.083648]  [  645.083676] [&lt;ffffffff8103ae66&gt;] save_stack_trace+0x16/0x20
[  645.083738]  [  645.083770] [&lt;ffffffff81228b06&gt;] save_stack+0x46/0xd0
[  645.083830]  [  645.083862] [&lt;ffffffff81229203&gt;] kasan_slab_free+0x73/0xc0
[  645.083922]  [  645.083961] [&lt;ffffffff812279c9&gt;] kfree+0xa9/0x170
[  645.084021]  [  645.084053] [&lt;ffffffff81629f60&gt;] i915_ppgtt_release+0x100/0x180
[  645.084139]  [  645.084171] [&lt;ffffffff8161d414&gt;] i915_gem_context_free+0x1b4/0x230
[  645.084257]  [  645.084288] [&lt;ffffffff816537b2&gt;] intel_lr_context_unpin+0x192/0x230
[  645.084380]  [  645.084413] [&lt;ffffffff81645250&gt;] i915_gem_request_retire+0x620/0x630
[  645.084500]  [  645.085226] [&lt;ffffffff816473d1&gt;] i915_gem_retire_requests+0x181/0x280
[  645.085313]  [  645.085352] [&lt;ffffffff816352ba&gt;] i915_gem_retire_work_handler+0xca/0xe0
[  645.085440]  [  645.085471] [&lt;ffffffff810c725b&gt;] process_one_work+0x4fb/0x920
[  645.085532]  [  645.085562] [&lt;ffffffff810c770d&gt;] worker_thread+0x8d/0x840
[  645.085622]  [  645.085653] [&lt;ffffffff810d21e5&gt;] kthread+0x185/0x1b0
[  645.085718]  [  645.085750] [&lt;ffffffff819ad7a7&gt;] ret_from_fork+0x27/0x40
[  645.085811] Memory state around the buggy address:
[  645.085869]  ffff880233564280: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  645.085956]  ffff880233564300: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  645.086053] &gt;ffff880233564380: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  645.086138]                                ^
[  645.086193]  ffff880233564400: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb
[  645.086283]  ffff880233564480: fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb fb

v2: Add a comment to document the hint like nature of
 intel_engine_last_submit()

Fixes: 73cb97010d4f ("drm/i915: Combine seqno + tracking into a global timeline struct")
Fixes: 80b204bce8f2 ("drm/i915: Enable multiple timelines")
Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161101100317.11129-1-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Enable multiple timelines</title>
<updated>2016-10-28T19:53:57+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-10-28T12:58:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=80b204bce8f27b52cd65839e0e6144b4452ae3de'/>
<id>urn:sha1:80b204bce8f27b52cd65839e0e6144b4452ae3de</id>
<content type='text'>
With the infrastructure converted over to tracking multiple timelines in
the GEM API whilst preserving the efficiency of using a single execution
timeline internally, we can now assign a separate timeline to every
context with full-ppgtt.

v2: Add a comment to indicate the xfer between timelines upon submission.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-35-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Convert breadcrumbs spinlock to be irqsafe</title>
<updated>2016-10-28T19:53:55+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-10-28T12:58:55+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f6168e330438a264123d2e0b502526f06594bb51'/>
<id>urn:sha1:f6168e330438a264123d2e0b502526f06594bb51</id>
<content type='text'>
The breadcrumbs are about to be used from within IRQ context sections
(e.g. nouveau signals a fence from an interrupt handler causing us to
submit a new request) and/or from bottom-half tasklets (i.e.
intel_lrc_irq_handler), therefore we need to employ the irqsafe spinlock
variants.

For example, deferring the request submission to the
intel_lrc_irq_handler generates this trace:

[   66.388639] =================================
[   66.388650] [ INFO: inconsistent lock state ]
[   66.388663] 4.9.0-rc2+ #56 Not tainted
[   66.388672] ---------------------------------
[   66.388682] inconsistent {SOFTIRQ-ON-W} -&gt; {IN-SOFTIRQ-W} usage.
[   66.388695] swapper/1/0 [HC0[0]:SC1[1]:HE0:SE0] takes:
[   66.388706]  (&amp;(&amp;b-&gt;lock)-&gt;rlock){+.?...} , at: [&lt;ffffffff81401c88&gt;] intel_engine_enable_signaling+0x78/0x150
[   66.388761] {SOFTIRQ-ON-W} state was registered at:
[   66.388772]   [   66.388783] [&lt;ffffffff810bd842&gt;] __lock_acquire+0x682/0x1870
[   66.388795]   [   66.388803] [&lt;ffffffff810bedbc&gt;] lock_acquire+0x6c/0xb0
[   66.388814]   [   66.388824] [&lt;ffffffff8161753a&gt;] _raw_spin_lock+0x2a/0x40
[   66.388835]   [   66.388845] [&lt;ffffffff81401e41&gt;] intel_engine_reset_breadcrumbs+0x21/0xb0
[   66.388857]   [   66.388866] [&lt;ffffffff81403ae7&gt;] gen8_init_common_ring+0x67/0x100
[   66.388878]   [   66.388887] [&lt;ffffffff81403b92&gt;] gen8_init_render_ring+0x12/0x60
[   66.388903]   [   66.388912] [&lt;ffffffff813f8707&gt;] i915_gem_init_hw+0xf7/0x2a0
[   66.388927]   [   66.388936] [&lt;ffffffff813f899b&gt;] i915_gem_init+0xbb/0xf0
[   66.388950]   [   66.388959] [&lt;ffffffff813b4980&gt;] i915_driver_load+0x7e0/0x1330
[   66.388978]   [   66.388988] [&lt;ffffffff813c09d8&gt;] i915_pci_probe+0x28/0x40
[   66.389003]   [   66.389013] [&lt;ffffffff812fa0db&gt;] pci_device_probe+0x8b/0xf0
[   66.389028]   [   66.389037] [&lt;ffffffff8147737e&gt;] driver_probe_device+0x21e/0x430
[   66.389056]   [   66.389065] [&lt;ffffffff8147766e&gt;] __driver_attach+0xde/0xe0
[   66.389080]   [   66.389090] [&lt;ffffffff814751ad&gt;] bus_for_each_dev+0x5d/0x90
[   66.389105]   [   66.389113] [&lt;ffffffff81477799&gt;] driver_attach+0x19/0x20
[   66.389134]   [   66.389144] [&lt;ffffffff81475ced&gt;] bus_add_driver+0x15d/0x260
[   66.389159]   [   66.389168] [&lt;ffffffff81477e3b&gt;] driver_register+0x5b/0xd0
[   66.389183]   [   66.389281] [&lt;ffffffff812fa19b&gt;] __pci_register_driver+0x5b/0x60
[   66.389301]   [   66.389312] [&lt;ffffffff81aed333&gt;] i915_init+0x3e/0x45
[   66.389326]   [   66.389336] [&lt;ffffffff81ac2ffa&gt;] do_one_initcall+0x8b/0x118
[   66.389350]   [   66.389359] [&lt;ffffffff81ac323a&gt;] kernel_init_freeable+0x1b3/0x23b
[   66.389378]   [   66.389387] [&lt;ffffffff8160fc39&gt;] kernel_init+0x9/0x100
[   66.389402]   [   66.389411] [&lt;ffffffff816180e7&gt;] ret_from_fork+0x27/0x40
[   66.389426] irq event stamp: 315865
[   66.389438] hardirqs last  enabled at (315864): [&lt;ffffffff816178f1&gt;] _raw_spin_unlock_irqrestore+0x31/0x50
[   66.389469] hardirqs last disabled at (315865): [&lt;ffffffff816176b3&gt;] _raw_spin_lock_irqsave+0x13/0x50
[   66.389499] softirqs last  enabled at (315818): [&lt;ffffffff8107a04c&gt;] _local_bh_enable+0x1c/0x50
[   66.389530] softirqs last disabled at (315819): [&lt;ffffffff8107a50e&gt;] irq_exit+0xbe/0xd0
[   66.389559]
[   66.389559] other info that might help us debug this:
[   66.389580]  Possible unsafe locking scenario:
[   66.389580]
[   66.389598]        CPU0
[   66.389609]        ----
[   66.389620]   lock(&amp;(&amp;b-&gt;lock)-&gt;rlock);
[   66.389650]   &lt;Interrupt&gt;
[   66.389661]     lock(&amp;(&amp;b-&gt;lock)-&gt;rlock);
[   66.389690]
[   66.389690]  *** DEADLOCK ***
[   66.389690]
[   66.389715] 2 locks held by swapper/1/0:
[   66.389728]  #0: (&amp;(&amp;tl-&gt;lock)-&gt;rlock){..-...}, at: [&lt;ffffffff81403e01&gt;] intel_lrc_irq_handler+0x201/0x3c0
[   66.389785]  #1: (&amp;(&amp;req-&gt;lock)-&gt;rlock/1){..-...}, at: [&lt;ffffffff813fc0af&gt;] __i915_gem_request_submit+0x8f/0x170
[   66.389854]
[   66.389854] stack backtrace:
[   66.389959] CPU: 1 PID: 0 Comm: swapper/1 Not tainted 4.9.0-rc2+ #56
[   66.389976] Hardware name:                  /        , BIOS PYBSWCEL.86A.0027.2015.0507.1758 05/07/2015
[   66.389999]  ffff88027fd03c58 ffffffff812beae5 ffff88027696e680 ffffffff822afe20
[   66.390036]  ffff88027fd03ca8 ffffffff810bb420 0000000000000001 0000000000000000
[   66.390070]  0000000000000000 0000000000000006 0000000000000004 ffff88027696ee10
[   66.390104] Call Trace:
[   66.390117]  &lt;IRQ&gt;
[   66.390128]  [&lt;ffffffff812beae5&gt;] dump_stack+0x68/0x93
[   66.390147]  [&lt;ffffffff810bb420&gt;] print_usage_bug+0x1d0/0x1e0
[   66.390164]  [&lt;ffffffff810bb8a0&gt;] mark_lock+0x470/0x4f0
[   66.390181]  [&lt;ffffffff810ba9d0&gt;] ? print_shortest_lock_dependencies+0x1b0/0x1b0
[   66.390203]  [&lt;ffffffff810bd75d&gt;] __lock_acquire+0x59d/0x1870
[   66.390221]  [&lt;ffffffff810bedbc&gt;] lock_acquire+0x6c/0xb0
[   66.390237]  [&lt;ffffffff810bedbc&gt;] ? lock_acquire+0x6c/0xb0
[   66.390255]  [&lt;ffffffff81401c88&gt;] ? intel_engine_enable_signaling+0x78/0x150
[   66.390273]  [&lt;ffffffff8161753a&gt;] _raw_spin_lock+0x2a/0x40
[   66.390291]  [&lt;ffffffff81401c88&gt;] ? intel_engine_enable_signaling+0x78/0x150
[   66.390309]  [&lt;ffffffff81401c88&gt;] intel_engine_enable_signaling+0x78/0x150
[   66.390327]  [&lt;ffffffff813fc170&gt;] __i915_gem_request_submit+0x150/0x170
[   66.390345]  [&lt;ffffffff81403e8b&gt;] intel_lrc_irq_handler+0x28b/0x3c0
[   66.390363]  [&lt;ffffffff81079d97&gt;] tasklet_action+0x57/0xc0
[   66.390380]  [&lt;ffffffff8107a249&gt;] __do_softirq+0x119/0x240
[   66.390396]  [&lt;ffffffff8107a50e&gt;] irq_exit+0xbe/0xd0
[   66.390414]  [&lt;ffffffff8101afd5&gt;] do_IRQ+0x65/0x110
[   66.390431]  [&lt;ffffffff81618806&gt;] common_interrupt+0x86/0x86
[   66.390446]  &lt;EOI&gt;
[   66.390457]  [&lt;ffffffff814ec6d1&gt;] ? cpuidle_enter_state+0x151/0x200
[   66.390480]  [&lt;ffffffff814ec7a2&gt;] cpuidle_enter+0x12/0x20
[   66.390498]  [&lt;ffffffff810b639e&gt;] call_cpuidle+0x1e/0x40
[   66.390516]  [&lt;ffffffff810b65ae&gt;] cpu_startup_entry+0x10e/0x1f0
[   66.390534]  [&lt;ffffffff81036133&gt;] start_secondary+0x103/0x130

(This is split out of the defer global seqno allocation patch due to
realisation that we need a more complete conversion if we want to defer
request submission even further.)

v2: lockdep was warning about mixed SOFTIRQ contexts not HARDIRQ
contexts so we only need to use spin_lock_bh and not disable interrupts.

v3: We need full irq protection as we may be called from a third party
interrupt handler (via fences).

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Cc: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Cc: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Reviewed-by: Tvrtko Ursulin &lt;tvrtko.ursulin@intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-32-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Move the global sync optimisation to the timeline</title>
<updated>2016-10-28T19:53:54+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-10-28T12:58:53+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=85e17f5974b357bc4a127be09de71b430be265e0'/>
<id>urn:sha1:85e17f5974b357bc4a127be09de71b430be265e0</id>
<content type='text'>
Currently we try to reduce the number of synchronisations (now the
number of requests we need to wait upon) by noting that if we have
earlier waited upon a request, all subsequent requests in the timeline
will be after the wait. This only applies to requests in this timeline,
as other timelines will not be ordered by that waiter.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-30-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Defer breadcrumb emission</title>
<updated>2016-10-28T19:53:54+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-10-28T12:58:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=caddfe7192f5e74d65ebcfdae614f99e8fd87222'/>
<id>urn:sha1:caddfe7192f5e74d65ebcfdae614f99e8fd87222</id>
<content type='text'>
Move the actual emission of the breadcrumb for closing the request from
i915_add_request() to the submit callback. (It can be moved later when
required.) This allows us to defer the allocation of the global_seqno
from request construction to actual submission, allowing us to emit the
requests out of order (wrt to the order of their construction, they
still will only be executed one all of their dependencies are resolved
including that all earlier requests on their timeline have been
submitted.) We have to specialise how we then emit the request in order
to write into the preallocated space, rather than at the tail of the
ringbuffer (which will have been advanced by the addition of new
requests).

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-29-chris@chris-wilson.co.uk
</content>
</entry>
<entry>
<title>drm/i915: Record space required for breadcrumb emission</title>
<updated>2016-10-28T19:53:53+00:00</updated>
<author>
<name>Chris Wilson</name>
<email>chris@chris-wilson.co.uk</email>
</author>
<published>2016-10-28T12:58:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=98f29e8d908f2b9e3d966f6f7d63cd69b4aaf0a2'/>
<id>urn:sha1:98f29e8d908f2b9e3d966f6f7d63cd69b4aaf0a2</id>
<content type='text'>
In the next patch, we will use deferred breadcrumb emission. That requires
reserving sufficient space in the ringbuffer to emit the breadcrumb, which
first requires us to know how large the breadcrumb is.

Signed-off-by: Chris Wilson &lt;chris@chris-wilson.co.uk&gt;
Reviewed-by: Joonas Lahtinen &lt;joonas.lahtinen@linux.intel.com&gt;
Link: http://patchwork.freedesktop.org/patch/msgid/20161028125858.23563-28-chris@chris-wilson.co.uk
</content>
</entry>
</feed>
