<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/gpu/drm/amd/amdgpu/cz_dpm.c, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-02T16:01:24+00:00</updated>
<entry>
<title>drm/amdgpu/cz: remove commented out call to enable vce pg</title>
<updated>2016-03-02T16:01:24+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-02-29T21:11:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=89913ea615754163ae9a066c9c1b95aa2a2f51b4'/>
<id>urn:sha1:89913ea615754163ae9a066c9c1b95aa2a2f51b4</id>
<content type='text'>
This code path is not currently enabled now that we properly
respect the vce pg flags, so uncomment the actual pg calls
so the code is as it should be we are eventually able to
enable vce pg.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cz: enable/disable vce dpm even if vce pg is disabled</title>
<updated>2016-03-02T16:01:23+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-02-25T16:24:52+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b3dae7828399ef316e3fabf7e82c6415cb03a02e'/>
<id>urn:sha1:b3dae7828399ef316e3fabf7e82c6415cb03a02e</id>
<content type='text'>
I missed this when cleaning up the vce pg handling.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Reviewed-by: Rex Zhu &lt;Rex.Zhu@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drma/dmgpu: move cg and pg flags into shared headers</title>
<updated>2016-02-08T15:37:47+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2016-02-05T15:56:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e3b04bc790ecd6d08d4699bc60b4f5a76f7f7b6b'/>
<id>urn:sha1:e3b04bc790ecd6d08d4699bc60b4f5a76f7f7b6b</id>
<content type='text'>
So they can be used by powerplay.

Reviewed-by: Eric Huang &lt;JinHuiEric.Huang@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cz: force vce clocks when sclks are forced</title>
<updated>2016-01-13T17:13:33+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-12-18T16:33:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=403664bbf840e80a45c4b97115ac518b40487f91'/>
<id>urn:sha1:403664bbf840e80a45c4b97115ac518b40487f91</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cz: force uvd clocks when sclks are forced</title>
<updated>2016-01-13T17:13:26+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-12-18T16:28:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5f57642672dd90e3183efcd9e6afbff1305a133a'/>
<id>urn:sha1:5f57642672dd90e3183efcd9e6afbff1305a133a</id>
<content type='text'>
Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cz: add code to enable forcing VCE clocks</title>
<updated>2016-01-13T17:12:43+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-12-18T16:25:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=044c0629b55d73235161557a48870d663d0072f5'/>
<id>urn:sha1:044c0629b55d73235161557a48870d663d0072f5</id>
<content type='text'>
VCE DPM works similarly to SCLK DPM.  Add a similar interface
for VCE for forcing the VCE clocks.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu/cz: add code to enable forcing UVD clocks</title>
<updated>2016-01-13T17:11:30+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-12-18T16:06:42+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d83b1e8132f91ba9e038b5206dc81d32ecac1f75'/>
<id>urn:sha1:d83b1e8132f91ba9e038b5206dc81d32ecac1f75</id>
<content type='text'>
UVD DPM works similarly to SCLK DPM.  Add a similar interface
for UVD for forcing the UVD clocks.

Reviewed-by: Christian König &lt;christian.koenig@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux into drm-next</title>
<updated>2015-10-29T23:48:28+00:00</updated>
<author>
<name>Dave Airlie</name>
<email>airlied@redhat.com</email>
</author>
<published>2015-10-29T23:48:28+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=f1a04d82585032d906e6a7d5b16d38a369033bd0'/>
<id>urn:sha1:f1a04d82585032d906e6a7d5b16d38a369033bd0</id>
<content type='text'>
More amdgpu and radeon stuff for drm-next.  Stoney support is the big change.
The rest is just bug fixes and code cleanups.  The Stoney stuff is pretty
low impact with respect to existing chips.

* 'drm-next-4.4' of git://people.freedesktop.org/~agd5f/linux:
  drm/amdgpu: change VM size default to 64GB
  drm/amdgpu: add Stoney pci ids
  drm/amdgpu: update the core VI support for Stoney
  drm/amdgpu: add VCE support for Stoney (v2)
  drm/amdgpu: add UVD support for Stoney
  drm/amdgpu: add GFX support for Stoney (v2)
  drm/amdgpu: add SDMA support for Stoney (v2)
  drm/amdgpu: add DCE support for Stoney
  drm/amdgpu: Update SMC/DPM for Stoney
  drm/amdgpu: add GMC support for Stoney
  drm/amdgpu: add Stoney chip family
  drm/amdgpu: fix the broken vm-&gt;mutex V2
  drm/amdgpu: remove the unnecessary parameter adev for amdgpu_fence_wait_any()
  drm/amdgpu: remove the exclusive lock
  drm/amdgpu: remove old lockup detection infrastructure
  drm: fix trivial typos
  drm/amdgpu/dce: simplify suspend/resume
  drm/amdgpu/gfx8: set TC_WB_ACTION_EN in RELEASE_MEM packet
  drm/radeon: Use rdev-&gt;gem.mutex to protect hyperz/cmask owners
</content>
</entry>
<entry>
<title>drm/amdgpu: Update SMC/DPM for Stoney</title>
<updated>2015-10-21T16:19:46+00:00</updated>
<author>
<name>Samuel Li</name>
<email>samuel.li@amd.com</email>
</author>
<published>2015-10-08T20:28:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7a753c3f3474458fa1d0b8f41617e41995bc4c40'/>
<id>urn:sha1:7a753c3f3474458fa1d0b8f41617e41995bc4c40</id>
<content type='text'>
Stoney is SMC 8.x.

Signed-off-by: Samuel Li &lt;samuel.li@amd.com&gt;
Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
</content>
</entry>
<entry>
<title>drm/amdgpu: add pm sysfs files late</title>
<updated>2015-10-02T20:09:47+00:00</updated>
<author>
<name>Alex Deucher</name>
<email>alexander.deucher@amd.com</email>
</author>
<published>2015-09-30T21:05:40+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fa022a9b65d2886486a022fd66b20c823cd76ad9'/>
<id>urn:sha1:fa022a9b65d2886486a022fd66b20c823cd76ad9</id>
<content type='text'>
They were added relatively early in the driver init process
which meant that in some cases the driver was not finished
initializing before external tools tried to use them which
could result in a crash depending on the timing.

Signed-off-by: Alex Deucher &lt;alexander.deucher@amd.com&gt;
Cc: stable@vger.kernel.org
</content>
</entry>
</feed>
