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<title>BMC/Intel-BMC/linux.git/drivers/firmware/qcom_scm.c, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-06-05T15:36:37+00:00</updated>
<entry>
<title>treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 284</title>
<updated>2019-06-05T15:36:37+00:00</updated>
<author>
<name>Thomas Gleixner</name>
<email>tglx@linutronix.de</email>
</author>
<published>2019-05-29T14:17:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=97fb5e8d9b57f10f294303c9a5d1bd033eded6bf'/>
<id>urn:sha1:97fb5e8d9b57f10f294303c9a5d1bd033eded6bf</id>
<content type='text'>
Based on 1 normalized pattern(s):

  this program is free software you can redistribute it and or modify
  it under the terms of the gnu general public license version 2 and
  only version 2 as published by the free software foundation this
  program is distributed in the hope that it will be useful but
  without any warranty without even the implied warranty of
  merchantability or fitness for a particular purpose see the gnu
  general public license for more details

extracted by the scancode license scanner the SPDX license identifier

  GPL-2.0-only

has been chosen to replace the boilerplate/reference in 294 file(s).

Signed-off-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Reviewed-by: Allison Randal &lt;allison@lohutok.net&gt;
Reviewed-by: Alexios Zavras &lt;alexios.zavras@intel.com&gt;
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190529141900.825281744@linutronix.de
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom: scm: Refactor clock handling</title>
<updated>2018-09-14T05:31:52+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2018-08-29T23:15:04+00:00</published>
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<id>urn:sha1:60cd420c91e28c2c10b3cde988466631bfcd35a3</id>
<content type='text'>
At one point in time all "future" platforms required three clocks, so
the binding and driver was written to treat this as the default case.
But new platforms has no clock requirements, which currently makes them
all a special case, causing the need for a patch in the binding and
driver for each new platform added.

This patch reworks the driver logic so that it will attempt to acquire
all three clocks and fail based on the given compatible. This allow us
to drop the clock requirement from "qcom,scm", in a way that will remain
backwards compatible with existing DT files.

Specific compatibles are added for apq8084, msm8916 and msm8974 to match
the updated binding and although equivalent to qcom,scm both ipq4019 and
msm8996 are kept as these have been used without fallback to qcom,scm.

The result of this patch is that new platforms, that require no clocks,
can be use the fallback compatible of "qcom,scm".

Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Reviewed-by: Stephen Boyd &lt;sboyd@kernel.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom: scm: Add ipq4019 soc compatible</title>
<updated>2018-04-25T05:10:33+00:00</updated>
<author>
<name>Sricharan R</name>
<email>sricharan@codeaurora.org</email>
</author>
<published>2018-03-23T10:18:44+00:00</published>
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<id>urn:sha1:53e51b4abeba149ca510e87339b1eb97db1c34fb</id>
<content type='text'>
Add the compatible for ipq4019.
This does not need clocks to do scm calls.

Reviewed-by: Rob Herring &lt;robh@kernel.org&gt;
Signed-off-by: Sricharan R &lt;sricharan@codeaurora.org&gt;
Acked-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom_scm: drop redandant of_platform_populate</title>
<updated>2017-12-20T21:38:34+00:00</updated>
<author>
<name>Sudeep Holla</name>
<email>Sudeep.Holla@arm.com</email>
</author>
<published>2017-09-28T10:46:00+00:00</published>
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<id>urn:sha1:12aeb917a54729c1324e28421a023f2f54aebf30</id>
<content type='text'>
Now that of_platform_default_populate_init() takes care of populating
all the devices under the /firmware/ node, this patch removes the
redandant call to of_platform_populate here.

Cc: Andy Gross &lt;andy.gross@linaro.org&gt;
Cc: David Brown &lt;david.brown@linaro.org&gt;
Cc: linux-arm-msm@vger.kernel.org
Signed-off-by: Sudeep Holla &lt;sudeep.holla@arm.com&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>Merge tag 'rproc-v4.15' of git://github.com/andersson/remoteproc</title>
<updated>2017-11-18T04:14:10+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2017-11-18T04:14:10+00:00</published>
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<id>urn:sha1:4f88bd23baab4335e96d38828ef38124ec717eb9</id>
<content type='text'>
Pull remoteproc updates from Bjorn Andersson:
 "This adds an interface for configuring Qualcomm's "secure SMMU" and
  adds support for booting the modem Hexagon on MSM8996.

  Two new debugfs entries are added in the remoteproc core to introspect
  the list of memory carveouts and the loaded resource table"

* tag 'rproc-v4.15' of git://github.com/andersson/remoteproc:
  remoteproc: qcom: Fix error handling paths in order to avoid memory leaks
  remoteproc: qcom: Drop pr_err in q6v5_xfer_mem_ownership()
  remoteproc: debug: add carveouts list dump feature
  remoteproc: debug: add resource table dump feature
  remoteproc: qcom: Add support for mss remoteproc on msm8996
  remoteproc: qcom: Make secure world call for mem ownership switch
  remoteproc: qcom: refactor mss fw image loading sequence
  firmware: scm: Add new SCM call API for switching memory ownership
</content>
</entry>
<entry>
<title>firmware: scm: Add new SCM call API for switching memory ownership</title>
<updated>2017-10-31T01:37:07+00:00</updated>
<author>
<name>Avaneesh Kumar Dwivedi</name>
<email>akdwived@codeaurora.org</email>
</author>
<published>2017-10-24T15:52:24+00:00</published>
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<id>urn:sha1:d82bd359972a7fe71a778396cf287bc9f9f3b981</id>
<content type='text'>
Two different processors on a SOC need to switch memory ownership
during load/unload. To enable this, second level memory map table
need to be updated, which is done by secure layer.
This patch adds the interface for making secure monitor call for
memory ownership switching request.

Acked-by: Andy Gross &lt;andy.gross@linaro.org&gt;
Signed-off-by: Avaneesh Kumar Dwivedi &lt;akdwived@codeaurora.org&gt;
[bjorn: Minor style and kerneldoc updates]
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom: scm: Expose download-mode control</title>
<updated>2017-10-12T04:48:27+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2017-08-14T22:46:18+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8c1b7dc9ba2294c6dbd1870a3d2e534bfda3047a'/>
<id>urn:sha1:8c1b7dc9ba2294c6dbd1870a3d2e534bfda3047a</id>
<content type='text'>
In order to aid post-mortem debugging the Qualcomm platforms provide a
"memory download mode", where the boot loader will provide an interface
for custom tools to "download" the content of RAM to a host machine.

The mode is triggered by writing a magic value somewhere in RAM, that is
read in the boot code path after a warm-restart. Two mechanism for
setting this magic value are supported in modern platforms; a direct SCM
call to enable the mode or through a secure io write of a magic value.

In order for a normal reboot not to trigger "download mode" the magic
must be cleared during a clean reboot.

Download mode has to be enabled by including qcom_scm.download_mode=1 on
the command line.

Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom: scm: Expose secure IO service</title>
<updated>2017-10-12T04:48:27+00:00</updated>
<author>
<name>Bjorn Andersson</name>
<email>bjorn.andersson@linaro.org</email>
</author>
<published>2017-08-14T22:46:17+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4e659dbe2d02a56ca0df25c77e099760252a329c'/>
<id>urn:sha1:4e659dbe2d02a56ca0df25c77e099760252a329c</id>
<content type='text'>
The secure IO service provides operations for reading and writing secure
memory from non-secure mode, expose this API through SCM.

Reviewed-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Bjorn Andersson &lt;bjorn.andersson@linaro.org&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware: qcom_scm: add two scm calls for iommu secure page table</title>
<updated>2017-03-28T21:03:21+00:00</updated>
<author>
<name>Stanimir Varbanov</name>
<email>stanimir.varbanov@linaro.org</email>
</author>
<published>2017-03-14T15:18:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b182cc4d597a6e73ff04ee1b7fb4f1a28f56ae3d'/>
<id>urn:sha1:b182cc4d597a6e73ff04ee1b7fb4f1a28f56ae3d</id>
<content type='text'>
Those two new SCM calls are needed from qcom-iommu driver in order
to initialize secure iommu page table.

Signed-off-by: Stanimir Varbanov &lt;stanimir.varbanov@linaro.org&gt;
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
<entry>
<title>firmware/qcom: add qcom_scm_restore_sec_cfg()</title>
<updated>2017-03-28T21:03:21+00:00</updated>
<author>
<name>Rob Clark</name>
<email>robdclark@gmail.com</email>
</author>
<published>2017-03-14T15:18:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a2c680c6ce386e9ca6cdf362e8b01789126c9bf7'/>
<id>urn:sha1:a2c680c6ce386e9ca6cdf362e8b01789126c9bf7</id>
<content type='text'>
Signed-off-by: Rob Clark &lt;robdclark@gmail.com&gt;
Signed-off-by: Andy Gross &lt;andy.gross@linaro.org&gt;
</content>
</entry>
</feed>
