<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/edac/altera_edac.c, branch dev-5.2</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.2'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2019-04-02T15:42:15+00:00</updated>
<entry>
<title>EDAC/altera, firmware/intel: Add Stratix10 ECC DBE SMC call</title>
<updated>2019-04-02T15:42:15+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-04-02T15:40:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=fad9fab975cb9fae651854c811cb07a30bc2b98a'/>
<id>urn:sha1:fad9fab975cb9fae651854c811cb07a30bc2b98a</id>
<content type='text'>
Reserve ECC Double Bit Error SMC call to alert U-Boot that a DBE has
occurred. Move the call from local EDAC header file to a common header.

 [ bp: Merge the two patches. ]

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Richard Gong &lt;richard.gong@intel.com&gt;
Reviewed-by: Alan Tull &lt;atull@kernel.org&gt; # firmware
Cc: Greg KH &lt;greg@kroah.com&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: mchehab@kernel.org
Link: https://lkml.kernel.org/r/1553870639-23895-1-git-send-email-thor.thayer@linux.intel.com

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
</content>
</entry>
<entry>
<title>EDAC/altera: Initialize peripheral FIFOs in probe()</title>
<updated>2019-03-29T10:46:23+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-03-26T21:29:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=788586efd116d6d7d05985881eda503333e702b4'/>
<id>urn:sha1:788586efd116d6d7d05985881eda503333e702b4</id>
<content type='text'>
The FIFO memory and ECC initialization doesn't need to be
done as a separate operation early in the startup.

Improve the Arria10 and Stratix10 peripheral FIFO init
by initializing memory and enabling ECC as part of the
device driver initialization.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1553635771-32693-2-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC/altera: Do less intrusive error injection</title>
<updated>2019-03-29T10:35:39+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-03-26T21:29:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=436b0a583af0497b4b84cb73c12f8bd620f868af'/>
<id>urn:sha1:436b0a583af0497b4b84cb73c12f8bd620f868af</id>
<content type='text'>
Improve the Arria10 and Stratix10 error injection routine
by reading the data and changing just 1 bit before writing
back out. Previous routine would overwrite the first bytes
to 0 then change 1 bit but this method is less intrusive.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1553635771-32693-1-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC, altera: Fix S10 Double Bit Error Notification</title>
<updated>2019-03-23T09:03:30+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-03-13T15:27:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1bd76ff448a91e35e451a96671b5594e3fffc4bd'/>
<id>urn:sha1:1bd76ff448a91e35e451a96671b5594e3fffc4bd</id>
<content type='text'>
Stratix10 Double Bit Error Address was always read from SDRAM Address
register instead of each device's Address register.

To determine which device had the DBE, cycle through the EDAC devices
comparing the DBE value to the db_irq value. Once found, report the DBE
Address from the device registers as well as the device name.

Finally, notify the system via an SMC call and indicate the panic should
result in a system reboot. Change a run-time check to a Stratix10
compile-time check for a clean SMC notification.

Fixes: d5fc9125566c ("EDAC, altera: Combine Stratix10 and Arria10 probe functions")
Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Link: https://lkml.kernel.org/r/1552490842-25440-1-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC/altera: Add separate SDRAM EDAC config</title>
<updated>2019-02-26T15:18:57+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2019-02-25T18:56:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=580b5cf50ca8f4781961382d54959683341b3126'/>
<id>urn:sha1:580b5cf50ca8f4781961382d54959683341b3126</id>
<content type='text'>
The CONFIG_ALTERA_EDAC Kconfig symbol always enables the SDRAM EDAC
functionality. On the newer architectures, however, there are cases
where the peripheral EDAC functionality is enabled but SDRAM needs to be
disabled.

Move SDRAM functions so they can be contained inside the conditional
CONFIG. Create new CONFIG option just for SDRAM.

 [ bp: Massage commit message. ]

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: dinguyen@kernel.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: linux@armlinux.org.uk
Link: https://lkml.kernel.org/r/1551121006-4657-2-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC, altera: Add missing of_node_put()</title>
<updated>2019-02-15T11:02:47+00:00</updated>
<author>
<name>Huang Zijiang</name>
<email>huang.zijiang@zte.com.cn</email>
</author>
<published>2019-02-14T06:39:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7f736599d632dde93bda79cca54fd5dcfd937e06'/>
<id>urn:sha1:7f736599d632dde93bda79cca54fd5dcfd937e06</id>
<content type='text'>
The call to of_parse_phandle() returns a node pointer with refcount
incremented thus it must be explicitly decremented here after the last
usage.

Signed-off-by: Huang Zijiang &lt;huang.zijiang@zte.com.cn&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Cc: James Morse &lt;james.morse@arm.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: linux-edac &lt;linux-edac@vger.kernel.org&gt;
Cc: wang.yi59@zte.com.cn
Link: https://lkml.kernel.org/r/1550126347-27984-1-git-send-email-huang.zijiang@zte.com.cn
</content>
</entry>
<entry>
<title>Merge tag 'edac_for_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp</title>
<updated>2018-10-25T13:40:00+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2018-10-25T13:40:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=36168d7123311d52e085c116f6c66e16f0b84615'/>
<id>urn:sha1:36168d7123311d52e085c116f6c66e16f0b84615</id>
<content type='text'>
Pull EDAC updates from Borislav Petkov:
 "The EDAC tree was busier than usual this cycle as the shortlog below
  shows.

  Also, this pull request is carrying an ACPI DSM driver which is used
  to ask the platform to supply the DIMM location of a reported hardware
  error and thus simplify all the EDAC logic when trying to map the
  error address to the respective DIMM.

  Core EDAC updates:

   - amd64_edac: AMD family 0x17, models 0x10-0x2f support (Michael Jin)
     Hygon Dhyana support (Pu Wen)

   - sb_edac: New maintainer + fixes (Tony Luck) Error reporting
     improvements and fixes (Qiuxu Zhuo)

   - ghes_edac: SMBIOS handle type 17 for DIMM locating and per-DIMM
     error accounting (Fan Wu)

   - altera_edac: Stratix10 support and refactoring (Thor Thayer)

  Out of tree addition:

   - acpi_adxl: Address Translation interface using an ACPI DSM (Tony
     Luck)

   - the usual amount of other misc fixes and cleanups all over"

* tag 'edac_for_4.20' of git://git.kernel.org/pub/scm/linux/kernel/git/bp/bp: (22 commits)
  ACPI/ADXL: Add address translation interface using an ACPI DSM
  EDAC, thunderx: Fix memory leak in thunderx_l2c_threaded_isr()
  EDAC, skx_edac: Fix logical channel intermediate decoding
  EDAC, {i7core,sb,skx}_edac: Fix uncorrected error counting
  EDAC, altera: Work around int-to-pointer-cast warnings
  EDAC, amd64: Add Hygon Dhyana support
  EDAC: Raise the maximum number of memory controllers
  arm64: dts: stratix10: Add peripheral EDAC nodes
  EDAC, altera: Add Stratix10 peripheral support
  EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine
  arm64: dts: stratix10: Add SDRAM node
  EDAC, altera: Combine Stratix10 and Arria10 probe functions
  arm64: dts: stratix10: Additions to EDAC System Manager
  EDAC, i7core: Remove set but not used variable pvt
  EDAC, ghes: Use CPER module handles to locate DIMMs
  EDAC: Correct DIMM capacity unit symbol
  EDAC, sb_edac: Fix signedness bugs in *_get_ha() functions
  EDAC, sb_edac: Fix reporting for patrol scrubber errors
  EDAC, sb_edac: Return early on ADDRV bit and address type test
  MAINTAINERS: Update maintainer for drivers/edac/sb_edac.c
  ...
</content>
</entry>
<entry>
<title>EDAC, altera: Work around int-to-pointer-cast warnings</title>
<updated>2018-09-28T08:09:27+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2018-09-27T10:09:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8537bf10976c56c6e0cc8b05a835e58cbbb1d287'/>
<id>urn:sha1:8537bf10976c56c6e0cc8b05a835e58cbbb1d287</id>
<content type='text'>
The altera edac driver passes a token from a DT resource as
resource_size_t into an SMC call, but casts it to an __iomem pointer and
then a plain void pointer inbetween, mixing three or four incompatible
types in the process. The compiler complains about one of the
conversions:

  drivers/edac/altera_edac.c: In function 'altr_init_a10_ecc_block':
  drivers/edac/altera_edac.c:1053:10: error: cast to pointer from integer of \
	  different size [-Werror=int-to-pointer-cast]
     base = (void __iomem *)res.start;
            ^
  drivers/edac/altera_edac.c: In function 'altr_edac_a10_probe':
  drivers/edac/altera_edac.c:2062:10: error: cast to pointer from integer of \
	  different size [-Werror=int-to-pointer-cast]
     base = (void __iomem *)res.start;

Using a static checker probably also notices the __iomem cast.  Solving
this properly isn't trivial, but simply casting to a 'uintptr_t' instead
of 'void __iomem *' makes it less wrong and should avoid the warnings.

Fixes: d5fc9125566c ("EDAC, altera: Combine Stratix10 and Arria10 probe functions")
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Reviewed-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Cc: Mauro Carvalho Chehab &lt;mchehab@kernel.org&gt;
Cc: David Frey &lt;dpfrey@gmail.com&gt;
Cc: Mark Rutland &lt;mark.rutland@arm.com&gt;
Cc: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/20180927100949.973078-1-arnd@arndb.de
</content>
</entry>
<entry>
<title>EDAC, altera: Add Stratix10 peripheral support</title>
<updated>2018-09-25T19:22:20+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2018-09-25T13:49:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=064acbd4f4ab509dd3f31e1a2d1e04a43d5b1009'/>
<id>urn:sha1:064acbd4f4ab509dd3f31e1a2d1e04a43d5b1009</id>
<content type='text'>
Add a new peripheral ECC error injection algorithm for Stratix10 and
some Arria10 peripherals. Inject a single bit error and upon readback,
it will be corrected and the SBE IRQ handler will be called.

Add regmap selection for Stratix10 or Arria10 peripheral device memory
initialization.

Add checks for both Arria10 and Stratix10 to the peripheral ECC setup.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: dinguyen@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-6-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
<entry>
<title>EDAC, altera: Merge Stratix10 into the Arria10 SDRAM probe routine</title>
<updated>2018-09-25T19:21:26+00:00</updated>
<author>
<name>Thor Thayer</name>
<email>thor.thayer@linux.intel.com</email>
</author>
<published>2018-09-25T13:49:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=08f08bfb7b4cc7b7037c8818acb1b6abccf2bd0e'/>
<id>urn:sha1:08f08bfb7b4cc7b7037c8818acb1b6abccf2bd0e</id>
<content type='text'>
Change Stratix10 regmap to use offsets from a base to match
the Arria10 regmap and allow re-use of the Arria10 functions.
Only the regmap initialization differs (Arria10 mmio_regmap
vs Stratix10 custom regmap).

Modify the SDRAM probe function to handle Stratix10. Remove the
Stratix10 offset defines if Arria10 can be used. Remove the unused
Stratix10 probe function.

Signed-off-by: Thor Thayer &lt;thor.thayer@linux.intel.com&gt;
Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Cc: dinguyen@kernel.org
Cc: robh+dt@kernel.org
Cc: mark.rutland@arm.com
Cc: mchehab@kernel.org
Cc: devicetree@vger.kernel.org
Cc: linux-edac@vger.kernel.org
Link: https://lkml.kernel.org/r/1537883342-30180-5-git-send-email-thor.thayer@linux.intel.com
</content>
</entry>
</feed>
