<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/crypto/cavium, branch dev-5.4</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.4</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.4'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2020-06-17T14:40:30+00:00</updated>
<entry>
<title>crypto: cavium/nitrox - Fix 'nitrox_get_first_device()' when ndevlist is fully iterated</title>
<updated>2020-06-17T14:40:30+00:00</updated>
<author>
<name>Christophe JAILLET</name>
<email>christophe.jaillet@wanadoo.fr</email>
</author>
<published>2020-05-30T13:35:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4a87772480aa468d93b5b89bd00ca741e94d3707'/>
<id>urn:sha1:4a87772480aa468d93b5b89bd00ca741e94d3707</id>
<content type='text'>
commit 320bdbd816156f9ca07e5fed7bfb449f2908dda7 upstream.

When a list is completely iterated with 'list_for_each_entry(x, ...)', x is
not NULL at the end.

While at it, remove a useless initialization of the ndev variable. It
is overridden by 'list_for_each_entry'.

Fixes: f2663872f073 ("crypto: cavium - Register the CNN55XX supported crypto algorithms.")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Christophe JAILLET &lt;christophe.jaillet@wanadoo.fr&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>crypto: cavium/nitrox - fix firmware assignment to AE cores</title>
<updated>2020-01-17T18:48:45+00:00</updated>
<author>
<name>Phani Kiran Hemadri</name>
<email>phemadri@marvell.com</email>
</author>
<published>2019-09-20T06:35:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=54f49fba82f8eb6283c8ef61e44f926c2b97a1c4'/>
<id>urn:sha1:54f49fba82f8eb6283c8ef61e44f926c2b97a1c4</id>
<content type='text'>
commit 6a97a99db848748d582d79447f7c9c330ce1688e upstream.

This patch fixes assigning UCD block number of Asymmetric crypto
firmware to AE cores of CNN55XX device.

Fixes: a7268c4d4205 ("crypto: cavium/nitrox - Add support for loading asymmetric crypto firmware")
Signed-off-by: Phani Kiran Hemadri &lt;phemadri@marvell.com&gt;
Reviewed-by: Srikanth Jampala &lt;jsrikanth@marvell.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>crypto: cavium/zip - Add missing single_release()</title>
<updated>2019-09-09T13:48:41+00:00</updated>
<author>
<name>Wei Yongjun</name>
<email>weiyongjun1@huawei.com</email>
</author>
<published>2019-09-04T14:18:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c552ffb5c93d9d65aaf34f5f001c4e7e8484ced1'/>
<id>urn:sha1:c552ffb5c93d9d65aaf34f5f001c4e7e8484ced1</id>
<content type='text'>
When using single_open() for opening, single_release() should be
used instead of seq_release(), otherwise there is a memory leak.

Fixes: 09ae5d37e093 ("crypto: zip - Add Compression/Decompression statistics")
Cc: &lt;stable@vger.kernel.org&gt;
Signed-off-by: Wei Yongjun &lt;weiyongjun1@huawei.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: des - split off DES library from generic DES cipher driver</title>
<updated>2019-08-22T04:57:33+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2019-08-15T09:01:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=04007b0e6cbbab5836ac891626e91edf10d46341'/>
<id>urn:sha1:04007b0e6cbbab5836ac891626e91edf10d46341</id>
<content type='text'>
Another one for the cipher museum: split off DES core processing into
a separate module so other drivers (mostly for crypto accelerators)
can reuse the code without pulling in the generic DES cipher itself.
This will also permit the cipher interface to be made private to the
crypto API itself once we move the only user in the kernel (CIFS) to
this library interface.

Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: nitrox/des - switch to new verification routines</title>
<updated>2019-08-22T04:39:39+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2019-08-15T09:00:50+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=43d81a8b258e1ed894af0f5d81921365004b6d90'/>
<id>urn:sha1:43d81a8b258e1ed894af0f5d81921365004b6d90</id>
<content type='text'>
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: cpt/des - switch to new verification routines</title>
<updated>2019-08-22T04:39:39+00:00</updated>
<author>
<name>Ard Biesheuvel</name>
<email>ard.biesheuvel@linaro.org</email>
</author>
<published>2019-08-15T09:00:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=0e1cbe9795ace1ea5e1621e52b9d918d9382fcfd'/>
<id>urn:sha1:0e1cbe9795ace1ea5e1621e52b9d918d9382fcfd</id>
<content type='text'>
Signed-off-by: Ard Biesheuvel &lt;ard.biesheuvel@linaro.org&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: cavium/nitrox - Configure asymmetric queue manager Hardware unit</title>
<updated>2019-08-15T11:52:14+00:00</updated>
<author>
<name>Phani Kiran Hemadri</name>
<email>phemadri@marvell.com</email>
</author>
<published>2019-08-08T12:17:39+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5f05cdca2727dd54a3ec84cb291663af6fb68672'/>
<id>urn:sha1:5f05cdca2727dd54a3ec84cb291663af6fb68672</id>
<content type='text'>
This patch configures and initializes CNN55XX device AQM hardware unit.

Signed-off-by: Phani Kiran Hemadri &lt;phemadri@marvell.com&gt;
Reviewed-by: Srikanth Jampala &lt;jsrikanth@marvell.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: cavium/nitrox - Allocate asymmetric crypto command queues</title>
<updated>2019-08-15T11:52:13+00:00</updated>
<author>
<name>Phani Kiran Hemadri</name>
<email>phemadri@marvell.com</email>
</author>
<published>2019-08-08T12:17:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b31c17c852736846c917bbd7f1263ea7258fbdce'/>
<id>urn:sha1:b31c17c852736846c917bbd7f1263ea7258fbdce</id>
<content type='text'>
This patch adds support to allocate CNN55XX device AQMQ command queues
required for submitting asymmetric crypto requests.

Signed-off-by: Phani Kiran Hemadri &lt;phemadri@marvell.com&gt;
Reviewed-by: Srikanth Jampala &lt;jsrikanth@marvell.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>crypto: cavium/nitrox - Add support for loading asymmetric crypto firmware</title>
<updated>2019-07-26T12:08:05+00:00</updated>
<author>
<name>Phani Kiran Hemadri</name>
<email>phemadri@marvell.com</email>
</author>
<published>2019-07-09T15:24:24+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a7268c4d4205b7f92eb77ac99d64099152b0f738'/>
<id>urn:sha1:a7268c4d4205b7f92eb77ac99d64099152b0f738</id>
<content type='text'>
This patch adds support to load Asymmetric crypto firmware on
AE cores of CNN55XX device. Firmware is stored on UCD block 2
and all available AE cores are tagged to group 0.

Signed-off-by: Phani Kiran Hemadri &lt;phemadri@marvell.com&gt;
Reviewed-by: Srikanth Jampala &lt;jsrikanth@marvell.com&gt;
Signed-off-by: Herbert Xu &lt;herbert@gondor.apana.org.au&gt;
</content>
</entry>
<entry>
<title>Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6</title>
<updated>2019-07-09T03:57:08+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2019-07-09T03:57:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4d2fa8b44b891f0da5ceda3e5a1402ccf0ab6f26'/>
<id>urn:sha1:4d2fa8b44b891f0da5ceda3e5a1402ccf0ab6f26</id>
<content type='text'>
Pull crypto updates from Herbert Xu:
 "Here is the crypto update for 5.3:

  API:
   - Test shash interface directly in testmgr
   - cra_driver_name is now mandatory

  Algorithms:
   - Replace arc4 crypto_cipher with library helper
   - Implement 5 way interleave for ECB, CBC and CTR on arm64
   - Add xxhash
   - Add continuous self-test on noise source to drbg
   - Update jitter RNG

  Drivers:
   - Add support for SHA204A random number generator
   - Add support for 7211 in iproc-rng200
   - Fix fuzz test failures in inside-secure
   - Fix fuzz test failures in talitos
   - Fix fuzz test failures in qat"

* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6: (143 commits)
  crypto: stm32/hash - remove interruptible condition for dma
  crypto: stm32/hash - Fix hmac issue more than 256 bytes
  crypto: stm32/crc32 - rename driver file
  crypto: amcc - remove memset after dma_alloc_coherent
  crypto: ccp - Switch to SPDX license identifiers
  crypto: ccp - Validate the the error value used to index error messages
  crypto: doc - Fix formatting of new crypto engine content
  crypto: doc - Add parameter documentation
  crypto: arm64/aes-ce - implement 5 way interleave for ECB, CBC and CTR
  crypto: arm64/aes-ce - add 5 way interleave routines
  crypto: talitos - drop icv_ool
  crypto: talitos - fix hash on SEC1.
  crypto: talitos - move struct talitos_edesc into talitos.h
  lib/scatterlist: Fix mapping iterator when sg-&gt;offset is greater than PAGE_SIZE
  crypto/NX: Set receive window credits to max number of CRBs in RxFIFO
  crypto: asymmetric_keys - select CRYPTO_HASH where needed
  crypto: serpent - mark __serpent_setkey_sbox noinline
  crypto: testmgr - dynamically allocate crypto_shash
  crypto: testmgr - dynamically allocate testvec_config
  crypto: talitos - eliminate unneeded 'done' functions at build time
  ...
</content>
</entry>
</feed>
