Intel OpenBMC Linux kernel source tree (mirror) https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6 2016-06-03T20:51:35+00:00 2016-06-03T20:51:35+00:00 Joel Stanley joel@jms.id.au 2016-05-06T06:53:10+00:00 urn:sha1:5c7aa976c59927284acfe737ba76f0ebe1eec217 The Aspeed SoC has timer IP with a very similar register layout to the moxart timer. This patch adds support for the fourth and fifth gen aspeed SoCs, and has been tested on the ast2400 and ast2500. Signed-off-by: Joel Stanley <joel@jms.id.au> 2016-06-03T20:51:35+00:00 Joel Stanley joel@jms.id.au 2016-05-06T06:52:59+00:00 urn:sha1:c8d168a10bc53d9ace55c6f30f9735ae89af2c40 Add a struct moxart_timer to hold the driver state, including the irqaction and struct clock_event_device. Most importantly this holds values for enabling and disabling the timer, so future support can be added for devices that use different bits for enable/disable. In preparation for future hardware support we add a MOXART prefix to the existing values. Signed-off-by: Joel Stanley <joel@jms.id.au> 2016-06-03T20:51:34+00:00 Joel Stanley joel@jms.id.au 2016-05-03T06:15:28+00:00 urn:sha1:b93f68d1eca5badfa86c1b1b77d1e493753cc76f Signed-off-by: Joel Stanley <joel@jms.id.au> 2015-08-10T09:40:32+00:00 Viresh Kumar viresh.kumar@linaro.org 2015-06-18T10:54:26+00:00 urn:sha1:37ae24716a584da33253cf6630a91c01b6656cc0 Migrate moxart driver to the new 'set-state' interface provided by clockevents core, the earlier 'set-mode' interface is marked obsolete now. This also enables us to implement callbacks for new states of clockevent devices, for example: ONESHOT_STOPPED. Cc: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2013-07-31T23:13:34+00:00 Jonas Jensen jonas.jensen@gmail.com 2013-07-26T14:03:38+00:00 urn:sha1:adf157ebf6097aa2abc7f05120e7dda6ed238252 bitops.h included implicitly, add #include <linux/bitops.h> Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org> 2013-07-18T13:27:47+00:00 Jonas Jensen jonas.jensen@gmail.com 2013-07-17T08:04:57+00:00 urn:sha1:07862c1cd6675cde2dd4bd64e64d704ea2185b79 This patch adds an clocksource driver for the main timer(s) found on MOXA ART SoCs. The MOXA ART SoC provides three separate timers with individual count/load/match registers, two are used here: TIMER1: clockevents, used to support oneshot and periodic events TIMER2: set up as a free running counter, used as clocksource Timers are preconfigured by bootloader to count down and interrupt on match or zero. Count increments every APB clock cycle and is automatically reloaded when it reaches zero. Signed-off-by: Jonas Jensen <jonas.jensen@gmail.com> Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>