<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/clk/sunxi, branch dev-4.6</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.6'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2016-03-29T23:30:07+00:00</updated>
<entry>
<title>clk: sunxi: Make reset_control_ops const</title>
<updated>2016-03-29T23:30:07+00:00</updated>
<author>
<name>Philipp Zabel</name>
<email>p.zabel@pengutronix.de</email>
</author>
<published>2016-02-25T09:45:10+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5e7bc9c6cee68fdd3583eb689583214a3d56341e'/>
<id>urn:sha1:5e7bc9c6cee68fdd3583eb689583214a3d56341e</id>
<content type='text'>
The sunxi_ve_reset_ops, sun9i_mmc_reset_ops, and sunxi_usb_reset_ops
structures are never modified. Make them const.

Signed-off-by: Philipp Zabel &lt;p.zabel@pengutronix.de&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Remove use of variable length array</title>
<updated>2016-03-15T22:15:27+00:00</updated>
<author>
<name>Stephen Boyd</name>
<email>sboyd@codeaurora.org</email>
</author>
<published>2016-03-04T17:18:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1295e36a488efdad9b21eb0aeabfd0b23a87a313'/>
<id>urn:sha1:1295e36a488efdad9b21eb0aeabfd0b23a87a313</id>
<content type='text'>
Using an array allocated on the stack may lead to stack overflows
and other problems so let's move the allocation to the heap
instead. This silences the following checker warning as well.

drivers/clk/sunxi/clk-sun8i-mbus.c:36:29: warning: Variable length array is used

Cc: Chen-Yu Tsai &lt;wens@csie.org&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Add apb0 gates for H3</title>
<updated>2016-02-25T19:30:32+00:00</updated>
<author>
<name>Krzysztof Adamski</name>
<email>k@japko.eu</email>
</author>
<published>2016-02-22T13:03:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6e17b4181603d183d20c73f4535529ddf2a2a020'/>
<id>urn:sha1:6e17b4181603d183d20c73f4535529ddf2a2a020</id>
<content type='text'>
This patch adds support for APB0 in H3. It seems to be compatible with
earlier SOCs. apb0 gates controls R_ block peripherals (R_PIO, R_IR,
etc).

Since this gates behave just like any Allwinner clock gate, add a generic
compatible that can be reused if we don't have any clock to protect.

Signed-off-by: Krzysztof Adamski &lt;k@japko.eu&gt;
[Maxime: Removed the H3 compatible from the simple-gates driver, reworked
         the commit log a bit]
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Improve divs_clk error handling and reporting</title>
<updated>2016-02-22T03:44:49+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2016-02-16T10:46:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=d331328da6b719e4ffb3b43125bbe540755239ad'/>
<id>urn:sha1:d331328da6b719e4ffb3b43125bbe540755239ad</id>
<content type='text'>
We catch errors in the base clock registration, failure to ioremap
and failures in the final of_clk_add_provider() call.
Also we unmap the registers when we need to rollback.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: improve divider_clk error handling and reporting</title>
<updated>2016-02-22T03:44:38+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2016-02-16T10:46:07+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b26803ebfba8d81e2e8fb392c1248df2ebd1ba83'/>
<id>urn:sha1:b26803ebfba8d81e2e8fb392c1248df2ebd1ba83</id>
<content type='text'>
We now report a failing ioremap, failing output names parsing,
failures in table registration and in the final step.
Also there was a bug where clk_register_divider_table() would return
an ERR_PTR value instead of NULL, which we were checking for.
We now implement proper rollback in case of an error.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: improve mux_clk error handling and reporting</title>
<updated>2016-02-22T03:44:09+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2016-02-16T10:46:06+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=72360b91164aa35753942e5310ae1e1d16e28611'/>
<id>urn:sha1:72360b91164aa35753942e5310ae1e1d16e28611</id>
<content type='text'>
We now catch and report a failing ioremap, also a failure in the final
step of the clock registration is now handled and reported.
Also warnings are turned into errors.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Fix sun8i-a23-apb0-clk divider flags</title>
<updated>2016-02-16T08:47:41+00:00</updated>
<author>
<name>Chen-Yu Tsai</name>
<email>wens@csie.org</email>
</author>
<published>2016-02-15T09:40:19+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=33f60d02605a3a604e56b07a78d80d7d801b2843'/>
<id>urn:sha1:33f60d02605a3a604e56b07a78d80d7d801b2843</id>
<content type='text'>
The APB0 clock on A23 is a zero-based divider, not a power-of-two based
divider.

Note that this patch does not apply cleanly to kernels before 4.5-rc1,
which added CLK_OF_DECLARE support to this driver.

Fixes: 57a1fbf28424 ("clk: sunxi: Add A23 APB0 divider clock support")
Signed-off-by: Chen-Yu Tsai &lt;wens@csie.org&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Remove clk_register_clkdev calls</title>
<updated>2016-02-11T19:05:47+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-02-02T08:37:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b0b6413f0dc8d1faba98745cf3a008ed9493df59'/>
<id>urn:sha1:b0b6413f0dc8d1faba98745cf3a008ed9493df59</id>
<content type='text'>
Now that our protection code doesn't use the global name lookup anymore, we
can remove the clkdev registrations.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: Remove old probe and protection code</title>
<updated>2016-02-11T19:05:47+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-02-02T08:07:37+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3a4d9af48a947b6605fb3a17505da94d70d05de4'/>
<id>urn:sha1:3a4d9af48a947b6605fb3a17505da94d70d05de4</id>
<content type='text'>
Now that we don't have any user left for the old registration code, we can
remove it.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>clk: sunxi: convert current clocks registration to CLK_OF_DECLARE</title>
<updated>2016-02-11T19:05:46+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-02-02T08:07:22+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c0872308752df85d817a730d6d5b2d7175c2305b'/>
<id>urn:sha1:c0872308752df85d817a730d6d5b2d7175c2305b</id>
<content type='text'>
The current clock registration and protection code has a few drawbacks, the
two main ones being that we create a lot of orphans clock in the
registration phase, which will be troublesome when we will start being less
relaxed about them.

The protection code also relies on clkdev, which we don't really use but
for this particular case.

Fix both at the same time by moving everyone to the CLK_OF_DECLARE that
will probe our clock tree in the right and thus avoid orphans, and by
protecting directly the clock returned by our registration function.

Reviewed-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
</feed>
