<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/drivers/clk/Makefile, branch dev-4.10</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-4.10'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2017-06-05T02:24:15+00:00</updated>
<entry>
<title>Merge tag 'v4.10.17' into dev-4.10</title>
<updated>2017-06-05T02:24:15+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-06-05T02:24:15+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=309678aa4cae5fe45ddfa1cf312625499851b6e1'/>
<id>urn:sha1:309678aa4cae5fe45ddfa1cf312625499851b6e1</id>
<content type='text'>
This is the 4.10.17 stable release
</content>
</entry>
<entry>
<title>clk: Make x86/ conditional on CONFIG_COMMON_CLK</title>
<updated>2017-05-14T12:08:24+00:00</updated>
<author>
<name>Pierre-Louis Bossart</name>
<email>pierre-louis.bossart@linux.intel.com</email>
</author>
<published>2017-01-23T18:07:41+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5e10d8dc000351158f06314448013a3b5f951795'/>
<id>urn:sha1:5e10d8dc000351158f06314448013a3b5f951795</id>
<content type='text'>
commit f35b6542c3ac3f28056d298348a81f7d56d3a041 upstream.

Fix Makefile for x86 support, dependency on CONFIG_COMMON_CLK
was not explicit

Fixes: 701190fd7419 ('clk: x86: add support for Lynxpoint LPSS clocks')
Signed-off-by: Pierre-Louis Bossart &lt;pierre-louis.bossart@linux.intel.com&gt;
Acked-by: Andy Shevchenko &lt;andriy.shevchenko@linux.intel.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
Signed-off-by: Greg Kroah-Hartman &lt;gregkh@linuxfoundation.org&gt;

</content>
</entry>
<entry>
<title>clk: Add Aspeed common code</title>
<updated>2017-03-22T14:04:16+00:00</updated>
<author>
<name>Joel Stanley</name>
<email>joel@jms.id.au</email>
</author>
<published>2017-02-12T09:38:12+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=77bdb70c2125c5d34458fd229315977650c88c1d'/>
<id>urn:sha1:77bdb70c2125c5d34458fd229315977650c88c1d</id>
<content type='text'>
OpenBMC-Staging-Count: 1
Signed-off-by: Joel Stanley &lt;joel@jms.id.au&gt;
</content>
</entry>
<entry>
<title>clk: Loongson1: Refactor Loongson1 clock</title>
<updated>2016-09-23T21:48:56+00:00</updated>
<author>
<name>Kelvin Cheung</name>
<email>keguang.zhang@gmail.com</email>
</author>
<published>2016-09-19T04:38:54+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a8e3ced421c1cd24221543a2bfda3134d46a6f21'/>
<id>urn:sha1:a8e3ced421c1cd24221543a2bfda3134d46a6f21</id>
<content type='text'>
Factor out the common functions into loongson1/clk.c
to support both Loongson1B and Loongson1C. And, put
the rest into loongson1/clk-loongson1b.c.

Signed-off-by: Kelvin Cheung &lt;keguang.zhang@gmail.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: uniphier: add core support code for UniPhier clock driver</title>
<updated>2016-09-16T23:31:33+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2016-09-16T07:40:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=734d82f4a678e897a3197b3e61313e32c9e77f46'/>
<id>urn:sha1:734d82f4a678e897a3197b3e61313e32c9e77f46</id>
<content type='text'>
This includes UniPhier clock driver code, except SoC-specific
data arrays.

Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: max77686: Combine Maxim max77686 and max77802 driver</title>
<updated>2016-08-15T22:32:41+00:00</updated>
<author>
<name>Laxman Dewangan</name>
<email>ldewangan@nvidia.com</email>
</author>
<published>2016-06-17T10:51:04+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8ad313fe4e0016bac5dc6a7fbb323b8551977bd9'/>
<id>urn:sha1:8ad313fe4e0016bac5dc6a7fbb323b8551977bd9</id>
<content type='text'>
The clock IP used on the Maxim PMICs max77686 and max77802 are
same. The configuration of clock register is also same except
the number of clocks.

Part of common code utilisation, there is 3 files for these chips
clock driver, one for common and two files for driver registration.

Combine both drivers into single file and move common code into
same common file reduces the 2 files and make max77686 and max77802
clock driver in single fine. This driver does not depends on the
parent driver structure. The regmap handle is acquired through
regmap APIs for the register access.

This combination of driver helps on adding clock driver for different
Maxim PMICs which has similar clock IP like MAX77620 and MAX20024.

Signed-off-by: Laxman Dewangan &lt;ldewangan@nvidia.com&gt;
CC: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
CC: Javier Martinez Canillas &lt;javier@dowhile0.org&gt;
Reviewed-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Tested-by: Javier Martinez Canillas &lt;javier@osg.samsung.com&gt;
Reviewed-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Tested-by: Krzysztof Kozlowski &lt;k.kozlowski@samsung.com&gt;
Signed-off-by: Stephen Boyd &lt;sboyd@codeaurora.org&gt;
</content>
</entry>
<entry>
<title>clk: Makefile: re-sort and clean up</title>
<updated>2016-07-19T16:53:52+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-06-16T00:09:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b328d2c110ad7b45af9cde2bce70803df28e9553'/>
<id>urn:sha1:b328d2c110ad7b45af9cde2bce70803df28e9553</id>
<content type='text'>
Sorting is hard.

Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'clk-sunxi-ng' into clk-next</title>
<updated>2016-07-09T01:08:56+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-07-09T01:08:56+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7adb76956189d10fd77f00b41b4d413480e94715'/>
<id>urn:sha1:7adb76956189d10fd77f00b41b4d413480e94715</id>
<content type='text'>
</content>
</entry>
<entry>
<title>clk: sunxi-ng: Add common infrastructure</title>
<updated>2016-07-09T01:04:32+00:00</updated>
<author>
<name>Maxime Ripard</name>
<email>maxime.ripard@free-electrons.com</email>
</author>
<published>2016-06-29T19:05:23+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb'/>
<id>urn:sha1:1d80c14248d6082c91a8a9e3d70cc94c3cc18ecb</id>
<content type='text'>
Start our new clock infrastructure by adding the registration code, common
structure and common code.

Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
Link: lkml.kernel.org/r/20160629190535.11855-3-maxime.ripard@free-electrons.com
</content>
</entry>
<entry>
<title>clk: meson: only build selected platforms</title>
<updated>2016-06-23T01:02:52+00:00</updated>
<author>
<name>Michael Turquette</name>
<email>mturquette@baylibre.com</email>
</author>
<published>2016-05-23T21:29:13+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=cb7c47d7066ca9fda053f5cb327ea49e14f42409'/>
<id>urn:sha1:cb7c47d7066ca9fda053f5cb327ea49e14f42409</id>
<content type='text'>
Break the AmLogic clock code up so that only the necessary parts are
compiled and linked. The core code is selected by both arm and arm64
builds with COMMON_CLK_AMLOGIC. The individual drivers have their own
config options as well.

Tested-by: Kevin Hilman &lt;khilman@baylibre.com&gt;
Signed-off-by: Michael Turquette &lt;mturquette@baylibre.com&gt;
</content>
</entry>
</feed>
