BMC/Intel-BMC/linux.git/drivers/base/regmap/regmap-irq.c, branch dev-5.2

Merge branch 'regmap-5.2' into regmap-next

2019-04-25T19:27:04+00:00

Merge branch 'regmap-5.1' into regmap-linus

2019-04-25T19:27:00+00:00

regmap: add proper SPDX identifiers on files that did not have them.

2019-04-25T19:22:15+00:00

There were a few files in the regmap code that did not have SPDX identifiers on them, so fix that up. At the same time, remove the "free form" text that specified the license of the file, as that is impossible for any tool to properly parse. Also, as Mark loves // comment markers, convert all of the headers to be the same to make things look consistent :) Signed-off-by: Greg Kroah-Hartman Signed-off-by: Mark Brown

regmap: regmap-irq: fix getting type default values

2019-04-01T08:11:41+00:00

Checking for value of type default value just after allocating will always be zero and the type register default values will never be read, so fix this! Without this patch setting irq type will be silently ignored. Patch "regmap: regmap-irq: Remove default irq type setting from core" did remove the default mask but it forgot to remove the check before reading the default type register. Fixes: 84267d1b18ab ("regmap: regmap-irq: Remove default irq type setting from core") Signed-off-by: Srinivas Kandagatla Signed-off-by: Mark Brown

Merge remote-tracking branch 'regmap/topic/irq' into regmap-next

2019-01-29T17:17:03+00:00

regmap: regmap-irq: Add main status register support

2019-01-23T15:52:15+00:00

There is bunch of devices with multiple logical blocks which can generate interrupts. It's not a rare case that the interrupt reason registers are arranged so that there is own status/ack/mask register for each logical block. In some devices there is also a 'main interrupt register(s)' which can indicate what sub blocks have interrupts pending. When such a device is connected via slow bus like i2c the main part of interrupt handling latency can be caused by bus accesses. On systems where it is expected that only one (or few) sub blocks have active interrupts we can reduce the latency by only reading the main register and those sub registers which have active interrupts. Support this with regmap-irq for simple cases where main register does not require acking or masking. Signed-off-by: Matti Vaittinen Signed-off-by: Mark Brown

regmap-irq: do not write mask register if mask_base is zero

2019-01-14T22:11:22+00:00

If client have not provided the mask base register then do not write into the mask register. Signed-off-by: Laxman Dewangan Signed-off-by: Jinyoung Park Signed-off-by: Venkat Reddy Talla Signed-off-by: Mark Zhang Signed-off-by: Mark Brown

regmap: regmap-irq: silently ignore unsupported type settings

2018-12-31T19:35:26+00:00

Do not return error if irq-type setting is requested for controlloer which does not support this. This is how regmap-irq has previously handled the undupported type settings and existing drivers seem to be upset if failure is now reported. Fixes: 1c2928e3e321 ("regmap: regmap-irq/gpio-max77620: add level-irq support") Signed-off-by: Matti Vaittinen Reported-by: Geert Uytterhoeven Signed-off-by: Mark Brown

regmap: irq: add an option to clear status registers on unmask

2018-12-19T18:38:13+00:00

Some interrupt controllers whose interrupts are acked on read will set the status bits for masked interrupts without changing the state of the IRQ line. Some chips have an additional "feature" where if those set bits are not cleared before unmasking their respective interrupts, the IRQ line will change the state and we'll interpret this as an interrupt although it actually fired when it was masked. Add a new field to the irq chip struct that tells the regmap irq chip code to always clear the status registers before actually changing the irq mask values. Signed-off-by: Bartosz Golaszewski Signed-off-by: Mark Brown

regmap: regmap-irq/gpio-max77620: add level-irq support

2018-12-19T18:35:45+00:00

Add level active IRQ support to regmap-irq irqchip. Change breaks existing regmap-irq type setting. Convert the existing drivers which use regmap-irq with trigger type setting (gpio-max77620) to work with this new approach. So we do not magically support level-active IRQs on gpio-max77620 - but add support to the regmap-irq for chips which support them =) We do not support distinguishing situation where HW supports rising and falling edge detection but not both. Separating this would require inventing yet another flags for IRQ types. Signed-off-by: Matti Vaittinen Signed-off-by: Mark Brown