<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch, branch dev-5.8-intel</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.8-intel</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev-5.8-intel'/>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/'/>
<updated>2021-03-17T23:03:36+00:00</updated>
<entry>
<title>ARM: dts: add silicon_id misc node into aspeed-bmc-intel-ast2600</title>
<updated>2021-03-17T23:03:36+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-03-10T16:47:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=563ee0c775ca0ab865e026277a81d2c41fb12f47'/>
<id>urn:sha1:563ee0c775ca0ab865e026277a81d2c41fb12f47</id>
<content type='text'>
This commit adds silicon_id sub-node into misc_control node.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Change-Id: I60c09b654ca8a8881e5df4be07f062280210e570
</content>
</entry>
<entry>
<title>hwmon: (aspeed-pwm-tacho) Add pwm chip driver support</title>
<updated>2021-02-19T19:32:13+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-02-17T22:54:03+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c98d1a33dd1c8acd71fa3914f9a2ad197eddcf19'/>
<id>urn:sha1:c98d1a33dd1c8acd71fa3914f9a2ad197eddcf19</id>
<content type='text'>
This commit adds pwm chip driver support into aspeed-g6-pwm-tacho
driver to enable beep speaker driver. The pwm chip driver cannot
be added as a separate platform driver because it makes resource
conflicts with existing pwm-tacho driver so it uses hacky tweak
on the existing driver.

Note: Do not try upstream this hacky implementation.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Change-Id: I22ad12be2ae3a061d7942fec813cdb11be321db7
</content>
</entry>
<entry>
<title>fixup! ARM: dts: aspeed-bmc-intel-ast2600: Update to latest SGPIOs</title>
<updated>2021-02-18T20:07:29+00:00</updated>
<author>
<name>Jason M. Bills</name>
<email>jason.m.bills@linux.intel.com</email>
</author>
<published>2021-02-11T20:31:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=8c1a9816e26b010b2650bc9fe879d57a9a5d3ace'/>
<id>urn:sha1:8c1a9816e26b010b2650bc9fe879d57a9a5d3ace</id>
<content type='text'>
Update based on the latest SGPIO list provided by the Archer City
CPLD team.

Change-Id: Ia14bcc86171f22b173229d46e1dc2cb9e241ad6f
Signed-off-by: Jason M. Bills &lt;jason.m.bills@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Enable mailbox interrupts</title>
<updated>2021-02-04T01:29:36+00:00</updated>
<author>
<name>Yong Li</name>
<email>yong.b.li@linux.intel.com</email>
</author>
<published>2021-01-29T10:11:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5d84cfdc23ae7e4f5687228cd5de9c8f3f64a0b1'/>
<id>urn:sha1:5d84cfdc23ae7e4f5687228cd5de9c8f3f64a0b1</id>
<content type='text'>
Support interrupt generation for both 16 and 32 mailbox registers.

Tested:
After applied this patch, write the mailbox registers from BIOS side,
the misc manager can capture the new mailbox data.

Change-Id: I4030b6df176a53656aea9cb68ee80b67add8ed14
Signed-off-by: Yong Li &lt;yong.b.li@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>ARM: dts: aspeed-bmc-intel-ast2600: add status_susack LED node</title>
<updated>2021-01-20T17:29:59+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-01-12T21:09:34+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b6f4b818b524ce1e819a5a5a13831627d8503692'/>
<id>urn:sha1:b6f4b818b524ce1e819a5a5a13831627d8503692</id>
<content type='text'>
This commit adds an LED control node for status_susack.

Change-Id: I324ac20ec14cecb4c3ff48ec2964a885ad6a4480
Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>fixup! ARM: dts: aspeed-bmc-intel-ast2600: Fix CPU2_MEM_VRHOT name</title>
<updated>2021-01-08T17:02:53+00:00</updated>
<author>
<name>Jason M. Bills</name>
<email>jason.m.bills@linux.intel.com</email>
</author>
<published>2021-01-07T23:55:38+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=db9c12eb93ff916d69a85b30ca866c1d216cb536'/>
<id>urn:sha1:db9c12eb93ff916d69a85b30ca866c1d216cb536</id>
<content type='text'>
Change-Id: I91a4b82df13c3e1a5ff826e4d893c970e4a1ae02
Signed-off-by: Jason M. Bills &lt;jason.m.bills@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Update I3C drivers</title>
<updated>2021-01-08T02:22:52+00:00</updated>
<author>
<name>Dylan Hung</name>
<email>dylan_hung@aspeedtech.com</email>
</author>
<published>2020-12-14T01:29:01+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=9f8a78c6a5891daeefcc059e03d0088868ad9807'/>
<id>urn:sha1:9f8a78c6a5891daeefcc059e03d0088868ad9807</id>
<content type='text'>
This commit ports I3C updates from Aspeed SDK v00.06.00.

Note: Should be refined to get upstreamed.

Signed-off-by: Dylan Hung &lt;dylan_hung@aspeedtech.com&gt;
Change-Id: Ic674bf5d6b5e72b389c739b136710915aabc6324
</content>
</entry>
<entry>
<title>ARM: dts: aspeed: enable gpio1 node</title>
<updated>2021-01-08T02:21:54+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2021-01-05T18:02:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=db7e148ddb8b0c901e4aae943519f07d613d43fa'/>
<id>urn:sha1:db7e148ddb8b0c901e4aae943519f07d613d43fa</id>
<content type='text'>
This commit enables gpio1 node.

Change-Id: I63e8731974190e2241db0bc41e3882f9be37cff4
Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
</content>
</entry>
<entry>
<title>Revert "Add a WA to defer flash writes on PS_ALERT_N assertion"</title>
<updated>2020-11-13T21:16:33+00:00</updated>
<author>
<name>Jae Hyun Yoo</name>
<email>jae.hyun.yoo@intel.com</email>
</author>
<published>2020-11-13T21:15:16+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=eddaafb5f78e202bf4c84faa9685fc7f81075caf'/>
<id>urn:sha1:eddaafb5f78e202bf4c84faa9685fc7f81075caf</id>
<content type='text'>
It's ineffective. A complete solution will be provided in CPLD logic.

This reverts commit 40fe787c69a2949684091b4647188d8915c8e2fa.

Signed-off-by: Jae Hyun Yoo &lt;jae.hyun.yoo@intel.com&gt;
Change-Id: I0e5972adfd424d64152f208b30add98b67e32d48
</content>
</entry>
<entry>
<title>Merge v5.8.17, commit '6d07b544ce203a684d9ca52635dcf2f4fc89b7d4' into dev-5.8-intel</title>
<updated>2020-11-05T01:31:53+00:00</updated>
<author>
<name>Jason M. Bills</name>
<email>jason.m.bills@linux.intel.com</email>
</author>
<published>2020-11-05T00:38:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=7de5aa18271ada4f01793f26f5b5f4253123d581'/>
<id>urn:sha1:7de5aa18271ada4f01793f26f5b5f4253123d581</id>
<content type='text'>
</content>
</entry>
</feed>
