BMC/Intel-BMC/linux.git/arch/x86/kernel/acpi, branch dev-4.18

Revert "x86/apic: Ignore secondary threads if nosmt=force"

2018-08-15T15:37:27+00:00

commit 506a66f374891ff08e064a058c446b336c5ac760 upstream. Dave Hansen reported, that it's outright dangerous to keep SMT siblings disabled completely so they are stuck in the BIOS and wait for SIPI. The reason is that Machine Check Exceptions are broadcasted to siblings and the soft disabled sibling has CR4.MCE = 0. If a MCE is delivered to a logical core with CR4.MCE = 0, it asserts IERR#, which shuts down or reboots the machine. The MCE chapter in the SDM contains the following blurb: Because the logical processors within a physical package are tightly coupled with respect to shared hardware resources, both logical processors are notified of machine check errors that occur within a given physical processor. If machine-check exceptions are enabled when a fatal error is reported, all the logical processors within a physical package are dispatched to the machine-check exception handler. If machine-check exceptions are disabled, the logical processors enter the shutdown state and assert the IERR# signal. When enabling machine-check exceptions, the MCE flag in control register CR4 should be set for each logical processor. Reverting the commit which ignores siblings at enumeration time solves only half of the problem. The core cpuhotplug logic needs to be adjusted as well. This thoughtful engineered mechanism also turns the boot process on all Intel HT enabled systems into a MCE lottery. MCE is enabled on the boot CPU before the secondary CPUs are brought up. Depending on the number of physical cores the window in which this situation can happen is smaller or larger. On a HSW-EX it's about 750ms: MCE is enabled on the boot CPU: [ 0.244017] mce: CPU supports 22 MCE banks The corresponding sibling #72 boots: [ 1.008005] .... node #0, CPUs: #72 That means if an MCE hits on physical core 0 (logical CPUs 0 and 72) between these two points the machine is going to shutdown. At least it's a known safe state. It's obvious that the early boot can be hit by an MCE as well and then runs into the same situation because MCEs are not yet enabled on the boot CPU. But after enabling them on the boot CPU, it does not make any sense to prevent the kernel from recovering. Adjust the nosmt kernel parameter documentation as well. Reverts: 2207def700f9 ("x86/apic: Ignore secondary threads if nosmt=force") Reported-by: Dave Hansen Signed-off-by: Thomas Gleixner Tested-by: Tony Luck Signed-off-by: Greg Kroah-Hartman

x86/apic: Ignore secondary threads if nosmt=force

2018-08-15T15:37:27+00:00

commit 2207def700f902f169fc237b717252c326f9e464 upstream. nosmt on the kernel command line merely prevents the onlining of the secondary SMT siblings. nosmt=force makes the APIC detection code ignore the secondary SMT siblings completely, so they even do not show up as possible CPUs. That reduces the amount of memory allocations for per cpu variables and saves other resources from being allocated too large. This is not fully equivalent to disabling SMT in the BIOS because the low level SMT enabling in the BIOS can result in partitioning of resources between the siblings, which is not undone by just ignoring them. Some CPUs can use the full resources when their sibling is not onlined, but this is depending on the CPU family and model and it's not well documented whether this applies to all partitioned resources. That means depending on the workload disabling SMT in the BIOS might result in better performance. Linus analysis of the Intel manual: The intel optimization manual is not very clear on what the partitioning rules are. I find: "In general, the buffers for staging instructions between major pipe stages are partitioned. These buffers include µop queues after the execution trace cache, the queues after the register rename stage, the reorder buffer which stages instructions for retirement, and the load and store buffers. In the case of load and store buffers, partitioning also provided an easier implementation to maintain memory ordering for each logical processor and detect memory ordering violations" but some of that partitioning may be relaxed if the HT thread is "not active": "In Intel microarchitecture code name Sandy Bridge, the micro-op queue is statically partitioned to provide 28 entries for each logical processor, irrespective of software executing in single thread or multiple threads. If one logical processor is not active in Intel microarchitecture code name Ivy Bridge, then a single thread executing on that processor core can use the 56 entries in the micro-op queue" but I do not know what "not active" means, and how dynamic it is. Some of that partitioning may be entirely static and depend on the early BIOS disabling of HT, and even if we park the cores, the resources will just be wasted. Signed-off-by: Thomas Gleixner Reviewed-by: Konrad Rzeszutek Wilk Acked-by: Ingo Molnar Signed-off-by: Greg Kroah-Hartman

x86/acpi: Prevent X2APIC id 0xffffffff from being accounted

2018-04-17T09:56:31+00:00

RongQing reported that there are some X2APIC id 0xffffffff in his machine's ACPI MADT table, which makes the number of possible CPU inaccurate. The reason is that the ACPI X2APIC parser has no sanity check for APIC ID 0xffffffff, which is an invalid id in all APIC types. See "Intel® 64 Architecture x2APIC Specification", Chapter 2.4.1. Add a sanity check to acpi_parse_x2apic() which ignores the invalid id. Reported-by: Li RongQing Signed-off-by: Dou Liyang Signed-off-by: Thomas Gleixner Cc: stable@vger.kernel.org Cc: len.brown@intel.com Cc: rjw@rjwysocki.net Cc: hpa@zytor.com Link: https://lkml.kernel.org/r/20180412014052.25186-1-douly.fnst@cn.fujitsu.com

Merge branch 'WIP.x86/asm' into x86/urgent, because the topic is ready

2018-04-12T07:42:34+00:00

Signed-off-by: Ingo Molnar

x86/apic: Fix signedness bug in APIC ID validity checks

2018-04-10T14:46:39+00:00

The APIC ID as parsed from ACPI MADT is validity checked with the apic->apic_id_valid() callback, which depends on the selected APIC type. For non X2APIC types APIC IDs >= 0xFF are invalid, but values > 0x7FFFFFFF are detected as valid. This happens because the 'apicid' argument of the apic_id_valid() callback is type 'int'. So the resulting comparison apicid < 0xFF evaluates to true for all unsigned int values > 0x7FFFFFFF which are handed to default_apic_id_valid(). As a consequence, invalid APIC IDs in !X2APIC mode are considered valid and accounted as possible CPUs. Change the apicid argument type of the apic_id_valid() callback to u32 so the evaluation is unsigned and returns the correct result. [ tglx: Massaged changelog ] Signed-off-by: Li RongQing Signed-off-by: Thomas Gleixner Cc: stable@vger.kernel.org Cc: jgross@suse.com Cc: Dou Liyang Cc: Peter Zijlstra Cc: hpa@zytor.com Link: https://lkml.kernel.org/r/1523322966-10296-1-git-send-email-lirongqing@baidu.com

ACPI, x86/boot: Introduce the ->reduced_hw_early_init() ACPI callback

2018-03-12T11:32:57+00:00

Some ACPI hardware reduced platforms need to initialize certain devices defined by the ACPI hardware specification even though in principle those devices should not be present in an ACPI hardware reduced platform. To allow that to happen, make it possible to override the generic x86_init callbacks and provide a custom legacy_pic value, add a new ->reduced_hw_early_init() callback to struct x86_init_acpi and make acpi_reduced_hw_init() use it. Signed-off-by: Andy Shevchenko Reviewed-by: Rafael J. Wysocki Cc: Eric Biederman Cc: Juergen Gross Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rafael J . Wysocki Cc: Thomas Gleixner Cc: linux-acpi@vger.kernel.org Link: http://lkml.kernel.org/r/20180220180506.65523-2-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar

ACPI, x86/boot: Split out acpi_generic_reduce_hw_init() and export

2018-03-12T11:32:57+00:00

This is a preparation patch to allow override the hardware reduced initialization on ACPI enabled platforms. No functional change intended. Signed-off-by: Andy Shevchenko Reviewed-by: Rafael J. Wysocki Cc: Eric Biederman Cc: Juergen Gross Cc: Linus Torvalds Cc: Peter Zijlstra Cc: Rafael J . Wysocki Cc: Thomas Gleixner Cc: linux-acpi@vger.kernel.org Link: http://lkml.kernel.org/r/20180220180506.65523-1-andriy.shevchenko@linux.intel.com Signed-off-by: Ingo Molnar

ACPI: SPCR: Make SPCR available to x86

2018-02-07T10:39:58+00:00

SPCR is currently only enabled or ARM64 and x86 can use SPCR to setup an early console. General fixes include updating Documentation & Kconfig (for x86), updating comments, and changing parse_spcr() to acpi_parse_spcr(), and earlycon_init_is_deferred to earlycon_acpi_spcr_enable to be more descriptive. On x86, many systems have a valid SPCR table but the table version is not 2 so the table version check must be a warning. On ARM64 when the kernel parameter earlycon is used both the early console and console are enabled. On x86, only the earlycon should be enabled by by default. Modify acpi_parse_spcr() to allow options for initializing the early console and console separately. Signed-off-by: Prarit Bhargava Acked-by: Ingo Molnar Reviewed-by: Mark Salter Tested-by: Mark Salter Signed-off-by: Rafael J. Wysocki

Merge tag 'acpi-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm

2018-01-29T18:17:53+00:00

Pull ACPI updates from Rafael Wysocki: "The majority of this is an update of the ACPICA kernel code to upstream revision 20171215 with a cosmetic change and a maintainers information update on top of it. The rest is mostly some minor fixes and cleanups in the ACPI drivers and cleanups to initialization on x86. Specifics: - Update the ACPICA kernel code to upstream revision 20171215 including: * Support for ACPI 6.0A changes in the NFIT table (Bob Moore) * Local 64-bit divide in string conversions (Bob Moore) * Fix for a regression in acpi_evaluate_object_type() (Bob Moore) * Fixes for memory leaks during package object resolution (Bob Moore) * Deployment of safe version of strncpy() (Bob Moore) * Debug and messaging updates (Bob Moore) * Support for PDTT, SDEV, TPM2 tables in iASL and tools (Bob Moore) * Null pointer dereference avoidance in Op and cleanups (Colin Ian King) * Fix for memory leak from building prefixed pathname (Erik Schmauss) * Coding style fixes, disassembler and compiler updates (Hanjun Guo, Erik Schmauss) * Additional PPTT flags from ACPI 6.2 (Jeremy Linton) * Fix for an off-by-one error in acpi_get_timer_duration() (Jung-uk Kim) * Infinite loop detection timeout and utilities cleanups (Lv Zheng) * Windows 10 version 1607 and 1703 OSI strings (Mario Limonciello) - Update ACPICA information in MAINTAINERS to reflect the current status of ACPICA maintenance and rename a local variable in one function to match the corresponding upstream code (Rafael Wysocki) - Clean up ACPI-related initialization on x86 (Andy Shevchenko) - Add support for Intel Merrifield to the ACPI GPIO code (Andy Shevchenko) - Clean up ACPI PMIC drivers (Andy Shevchenko, Arvind Yadav) - Fix the ACPI Generic Event Device (GED) driver to free IRQs on shutdown and clean up the PCI IRQ Link driver (Sinan Kaya) - Make the GHES code call into the AER driver on all errors and clean up the ACPI APEI code (Colin Ian King, Tyler Baicar) - Make the IA64 ACPI NUMA code parse all SRAT entries (Ganapatrao Kulkarni) - Add a lid switch blacklist to the ACPI button driver and make it print extra debug messages on lid events (Hans de Goede) - Add quirks for Asus GL502VSK and UX305LA to the ACPI battery driver and clean it up somewhat (Bjørn Mork, Kai-Heng Feng) - Add device link for CHT SD card dependency on I2C to the ACPI LPSS (Intel SoCs) driver and make it avoid creating platform device objects for devices without MMIO resources (Adrian Hunter, Hans de Goede) - Fix the ACPI GPE mask kernel command line parameter handling (Prarit Bhargava) - Fix the handling of (incorrectly exposed) backlight interfaces without LCD (Hans de Goede) - Fix the usage of debugfs_create_*() in the ACPI EC driver (Geert Uytterhoeven)" * tag 'acpi-4.16-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (62 commits) ACPI/PCI: pci_link: reduce verbosity when IRQ is enabled ACPI / LPSS: Do not instiate platform_dev for devs without MMIO resources ACPI / PMIC: Convert to use builtin_platform_driver() macro ACPI / x86: boot: Propagate error code in acpi_gsi_to_irq() ACPICA: Update version to 20171215 ACPICA: trivial style fix, no functional change ACPICA: Fix a couple memory leaks during package object resolution ACPICA: Recognize the Windows 10 version 1607 and 1703 OSI strings ACPICA: DT compiler: prevent error if optional field at the end of table is not present ACPICA: Rename a global variable, no functional change ACPICA: Create and deploy safe version of strncpy ACPICA: Cleanup the global variables and update comments ACPICA: Debugger: fix slight indentation issue ACPICA: Fix a regression in the acpi_evaluate_object_type() interface ACPICA: Update for a few debug output statements ACPICA: Debug output, no functional change ACPI: EC: Fix debugfs_create_*() usage ACPI / video: Default lcd_only to true on Win8-ready and newer machines ACPI / x86: boot: Don't setup SCI on HW-reduced platforms ACPI / x86: boot: Use INVALID_ACPI_IRQ instead of 0 for acpi_sci_override_gsi ...

ACPI / x86: boot: Propagate error code in acpi_gsi_to_irq()

2018-01-05T13:10:24+00:00

acpi_get_override_irq() followed by acpi_register_gsi() returns negative error code on failure. Propagate it from acpi_gsi_to_irq() to callers. Signed-off-by: Andy Shevchenko [ rjw : Subject/changelog ] Signed-off-by: Rafael J. Wysocki