<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/x86/kernel/acpi/sleep.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
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<updated>2015-02-04T11:10:42+00:00</updated>
<entry>
<title>x86: Store a per-cpu shadow copy of CR4</title>
<updated>2015-02-04T11:10:42+00:00</updated>
<author>
<name>Andy Lutomirski</name>
<email>luto@amacapital.net</email>
</author>
<published>2014-10-24T22:58:08+00:00</published>
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<id>urn:sha1:1e02ce4cccdcb9688386e5b8d2c9fa4660b45389</id>
<content type='text'>
Context switches and TLB flushes can change individual bits of CR4.
CR4 reads take several cycles, so store a shadow copy of CR4 in a
per-cpu variable.

To avoid wasting a cache line, I added the CR4 shadow to
cpu_tlbstate, which is already touched in switch_mm.  The heaviest
users of the cr4 shadow will be switch_mm and __switch_to_xtra, and
__switch_to_xtra is called shortly after switch_mm during context
switch, so the cacheline is likely to be hot.

Signed-off-by: Andy Lutomirski &lt;luto@amacapital.net&gt;
Reviewed-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Kees Cook &lt;keescook@chromium.org&gt;
Cc: Andrea Arcangeli &lt;aarcange@redhat.com&gt;
Cc: Vince Weaver &lt;vince@deater.net&gt;
Cc: "hillf.zj" &lt;hillf.zj@alibaba-inc.com&gt;
Cc: Valdis Kletnieks &lt;Valdis.Kletnieks@vt.edu&gt;
Cc: Paul Mackerras &lt;paulus@samba.org&gt;
Cc: Arnaldo Carvalho de Melo &lt;acme@kernel.org&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Link: http://lkml.kernel.org/r/3a54dd3353fffbf84804398e00dfdc5b7c1afd7d.1414190806.git.luto@amacapital.net
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>asmlinkage, x86: Add explicit __visible to arch/x86/*</title>
<updated>2014-05-05T23:07:44+00:00</updated>
<author>
<name>Andi Kleen</name>
<email>ak@linux.intel.com</email>
</author>
<published>2014-05-01T22:44:37+00:00</published>
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<id>urn:sha1:2605fc216fa492f9e7c488bdc7f687cd6dcc703b</id>
<content type='text'>
As requested by Linus add explicit __visible to the asmlinkage users.
This marks all functions visible to assembler.

Tree sweep for arch/x86/*

Signed-off-by: Andi Kleen &lt;ak@linux.intel.com&gt;
Link: http://lkml.kernel.org/r/1398984278-29319-3-git-send-email-andi@firstfloor.org
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>ACPICA: Cleanup asmlinkage for ACPICA APIs.</title>
<updated>2013-10-31T13:37:35+00:00</updated>
<author>
<name>Lv Zheng</name>
<email>lv.zheng@intel.com</email>
</author>
<published>2013-10-31T01:31:18+00:00</published>
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<id>urn:sha1:40bce100cafb945f1fb5475a70628b4379c74f38</id>
<content type='text'>
Add an asmlinkage wrapper around acpi_enter_sleep_state() to prevent
an empty stub from being called by assmebly code for ACPI_REDUCED_HARDWARE
set.

As arch/x86/kernel/acpi/wakeup_xx.S is only compiled when CONFIG_ACPI=y
and there are no users of ACPI_HARDWARE_REDUCED, currently this is in
fact not a real issue, but a cleanup to reduce source code differences
between Linux and ACPICA upstream.

[rjw: Changelog]
Signed-off-by: Lv Zheng &lt;lv.zheng@intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, suspend: Handle CPUs which fail to #GP on RDMSR</title>
<updated>2013-07-15T20:50:54+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@linux.intel.com</email>
</author>
<published>2013-07-12T23:48:12+00:00</published>
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<id>urn:sha1:5ff560fd48d5b3d82fa0c3aff625c9da1a301911</id>
<content type='text'>
There are CPUs which have errata causing RDMSR of a nonexistent MSR to
not fault.  We would then try to WRMSR to restore the value of that
MSR, causing a crash.  Specifically, some Pentium M variants would
have this problem trying to save and restore the non-existent EFER,
causing a crash on resume.

Work around this by making sure we can write back the result at
suspend time.

Huge thanks to Christian Sünkenberg for finding the offending erratum
that finally deciphered the mystery.

Reported-and-tested-by: Johan Heinrich &lt;onny@project-insanity.org&gt;
Debugged-by: Christian Sünkenberg &lt;christian.suenkenberg@student.kit.edu&gt;
Acked-by: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Link: http://lkml.kernel.org/r/51DDC972.3010005@student.kit.edu
Cc: &lt;stable@vger.kernel.org&gt; # v3.7+
</content>
</entry>
<entry>
<title>x86 / ACPI / sleep: Provide registration for acpi_suspend_lowlevel.</title>
<updated>2013-06-19T21:36:30+00:00</updated>
<author>
<name>Konrad Rzeszutek Wilk</name>
<email>konrad.wilk@oracle.com</email>
</author>
<published>2013-05-14T17:09:16+00:00</published>
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<id>urn:sha1:d6a77ead21b69c395ca6d09a066ededfac601bcc</id>
<content type='text'>
Which by default will be x86_acpi_suspend_lowlevel.
This registration allows us to register another callback
if there is a need to use another platform specific callback.

Signed-off-by: Liang Tang &lt;liang.tang@oracle.com&gt;
Signed-off-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Tested-by: Ben Guthro &lt;benjamin.guthro@citrix.com&gt;
Acked-by: "H. Peter Anvin" &lt;hpa@linux.intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, xen, gdt: Remove the pvops variant of store_gdt.</title>
<updated>2013-04-11T22:40:38+00:00</updated>
<author>
<name>Konrad Rzeszutek Wilk</name>
<email>konrad.wilk@oracle.com</email>
</author>
<published>2013-04-05T20:42:23+00:00</published>
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<id>urn:sha1:357d122670937c35b33d99c46356ef2b63182a1f</id>
<content type='text'>
The two use-cases where we needed to store the GDT were during ACPI S3 suspend
and resume. As the patches:
 x86/gdt/i386: store/load GDT for ACPI S3 or hibernation/resume path is not needed
 x86/gdt/64-bit: store/load GDT for ACPI S3 or hibernate/resume path is not needed.

have demonstrated - there are other mechanism by which the GDT is
saved and reloaded during early resume path.

Hence we do not need to worry about the pvops call-chain for saving the
GDT and can and can eliminate it. The other areas where the store_gdt is
used are never going to be hit when running under the pvops platforms.

Signed-off-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Link: http://lkml.kernel.org/r/1365194544-14648-4-git-send-email-konrad.wilk@oracle.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'v3.8-rc5' into x86/mm</title>
<updated>2013-01-26T00:31:21+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@linux.intel.com</email>
</author>
<published>2013-01-26T00:31:21+00:00</published>
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<id>urn:sha1:7b5c4a65cc27f017c170b025f8d6d75dabb11c6f</id>
<content type='text'>
The __pa() fixup series that follows touches KVM code that is not
present in the existing branch based on v3.7-rc5, so merge in the
current upstream from Linus.

Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86/acpi: Use __pa_symbol instead of __pa on C visible symbols</title>
<updated>2012-11-17T00:42:10+00:00</updated>
<author>
<name>Alexander Duyck</name>
<email>alexander.h.duyck@intel.com</email>
</author>
<published>2012-11-16T21:57:43+00:00</published>
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<id>urn:sha1:afd51a0e32cd79261f0e823400886ed322a355ac</id>
<content type='text'>
This change just updates one spot where __pa was being used when __pa_symbol
should have been used.  By using __pa_symbol we are able to drop a few extra
lines of code as we don't have to test to see if the virtual pointer is a
part of the kernel text or just standard virtual memory.

Cc: Len Brown &lt;len.brown@intel.com&gt;
Cc: Pavel Machek &lt;pavel@ucw.cz&gt;
Acked-by: "Rafael J. Wysocki" &lt;rjw@sisk.pl&gt;
Signed-off-by: Alexander Duyck &lt;alexander.h.duyck@intel.com&gt;
Link: http://lkml.kernel.org/r/20121116215737.8521.51167.stgit@ahduyck-cp1.jf.intel.com
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>ACPI / Sleep: add acpi_sleep=nonvs_s3 parameter</title>
<updated>2012-11-14T23:16:02+00:00</updated>
<author>
<name>Kristen Carlson Accardi</name>
<email>kristen@linux.intel.com</email>
</author>
<published>2012-10-26T11:39:15+00:00</published>
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<id>urn:sha1:1bad2f19f7f79d1ec9e6c48168fd7ce8dc1c305f</id>
<content type='text'>
The ACPI specificiation would like us to save NVS at hibernation time,
but makes no mention of saving NVS over S3.  Not all versions of
Windows do this either, and it is clear that not all machines need NVS
saved/restored over S3.  Allow the user to improve their suspend/resume
time by disabling the NVS save/restore at S3 time, but continue to do
the NVS save/restore for S4 as specified.

Signed-off-by: Kristen Carlson Accardi &lt;kristen@linux.intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, suspend: On wakeup always initialize cr4 and EFER</title>
<updated>2012-09-26T22:06:22+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@linux.intel.com</email>
</author>
<published>2012-09-26T22:02:34+00:00</published>
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<id>urn:sha1:73201dbec64aebf6b0dca855b523f437972dc7bb</id>
<content type='text'>
We already have a flag word to indicate the existence of MISC_ENABLES,
so use the same flag word to indicate existence of cr4 and EFER, and
always restore them if they exist.  That way if something passes a
nonzero value when the value *should* be zero, we will still
initialize it.

Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Cc: Rafael J. Wysocki &lt;rjw@sisk.pl&gt;
Link: http://lkml.kernel.org/r/1348529239-17943-1-git-send-email-hpa@linux.intel.com
</content>
</entry>
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