<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/x86/include/asm/svm.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2012-12-14T22:37:13+00:00</updated>
<entry>
<title>UAPI: (Scripted) Disintegrate arch/x86/include/asm</title>
<updated>2012-12-14T22:37:13+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-12-14T22:37:13+00:00</published>
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<id>urn:sha1:af170c5061dd78512c469e6e2d211980cdb2c193</id>
<content type='text'>
Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Michael Kerrisk &lt;mtk.manpages@gmail.com&gt;
Acked-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Acked-by: Dave Jones &lt;davej@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86: Export svm/vmx exit code and vector code to userspace</title>
<updated>2012-09-21T15:48:09+00:00</updated>
<author>
<name>Xiao Guangrong</name>
<email>xiaoguangrong@linux.vnet.ibm.com</email>
</author>
<published>2012-09-17T08:31:13+00:00</published>
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<id>urn:sha1:26bf264e871a4b9a8ac09c21a2b518e7f23830d5</id>
<content type='text'>
Exporting KVM exit information to userspace to be consumed by perf.

Signed-off-by: Dong Hao &lt;haodong@linux.vnet.ibm.com&gt;
[ Dong Hao &lt;haodong@linux.vnet.ibm.com&gt;: rebase it on acme's git tree ]
Signed-off-by: Xiao Guangrong &lt;xiaoguangrong@linux.vnet.ibm.com&gt;
Acked-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Cc: Avi Kivity &lt;avi@redhat.com&gt;
Cc: David Ahern &lt;dsahern@gmail.com&gt;
Cc: Ingo Molnar &lt;mingo@kernel.org&gt;
Cc: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
Cc: kvm@vger.kernel.org
Cc: Runzhen Wang &lt;runzhen@linux.vnet.ibm.com&gt;
Link: http://lkml.kernel.org/r/1347870675-31495-2-git-send-email-haodong@linux.vnet.ibm.com
Signed-off-by: Arnaldo Carvalho de Melo &lt;acme@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: copy instruction bytes from VMCB</title>
<updated>2011-01-12T09:31:07+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@amd.com</email>
</author>
<published>2010-12-21T10:12:07+00:00</published>
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<id>urn:sha1:dc25e89e07d5ef31c476117d2c76b34dbb22196c</id>
<content type='text'>
In case of a nested page fault or an intercepted #PF newer SVM
implementations provide a copy of the faulting instruction bytes
in the VMCB.
Use these bytes to feed the instruction emulator and avoid the costly
guest instruction fetch in this case.

Signed-off-by: Andre Przywara &lt;andre.przywara@amd.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: enhance MOV CR intercept handler</title>
<updated>2011-01-12T09:31:03+00:00</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@amd.com</email>
</author>
<published>2010-12-21T10:12:04+00:00</published>
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<id>urn:sha1:7ff76d58a9dc03a38b86d283abcaae2ac3c74fe3</id>
<content type='text'>
Newer SVM implementations provide the GPR number in the VMCB, so
that the emulation path is no longer necesarry to handle CR
register access intercepts. Implement the handling in svm.c and
use it when the info is provided.

Signed-off-by: Andre Przywara &lt;andre.przywara@amd.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: Add xsetbv intercept</title>
<updated>2011-01-12T09:30:49+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2010-12-07T16:15:06+00:00</published>
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<id>urn:sha1:81dd35d42c9aef3c1f7ae6ce4cf6a0d382661db5</id>
<content type='text'>
This patch implements the xsetbv intercept to the AMD part
of KVM. This makes AVX usable in a save way for the guest on
AVX capable AMD hardware.

The patch is tested by using AVX in the guest and host in
parallel and checking for data corruption. I also used the
KVM xsave unit-tests and they all pass.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: Implement Flush-By-Asid feature</title>
<updated>2011-01-12T09:30:45+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2010-12-03T14:25:16+00:00</published>
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<id>urn:sha1:38e5e92fe8c02a8766459d505423b855caf9af1f</id>
<content type='text'>
This patch adds the new flush-by-asid of upcoming AMD
processors to the KVM-AMD module.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: Add clean-bits infrastructure code</title>
<updated>2011-01-12T09:30:22+00:00</updated>
<author>
<name>Roedel, Joerg</name>
<email>Joerg.Roedel@amd.com</email>
</author>
<published>2010-12-03T12:15:21+00:00</published>
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<id>urn:sha1:8d28fec406e4d5ce6c109fe12699976e72e9748e</id>
<content type='text'>
This patch adds the infrastructure for the implementation of
the individual clean-bits.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Avi Kivity &lt;avi@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: Add manipulation functions for DRx intercepts</title>
<updated>2011-01-12T09:30:11+00:00</updated>
<author>
<name>Joerg Roedel</name>
<email>joerg.roedel@amd.com</email>
</author>
<published>2010-11-30T17:03:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=3aed041a4c1b78cac87db76cf264b081df64dd37'/>
<id>urn:sha1:3aed041a4c1b78cac87db76cf264b081df64dd37</id>
<content type='text'>
This patch wraps changes to the DRx intercepts of SVM into
seperate functions to abstract nested-svm better and prepare
the implementation of the vmcb-clean-bits feature.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: SVM: Add manipulation functions for CRx intercepts</title>
<updated>2011-01-12T09:30:10+00:00</updated>
<author>
<name>Roedel, Joerg</name>
<email>Joerg.Roedel@amd.com</email>
</author>
<published>2010-12-03T09:50:51+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4ee546b434504a618eac40421e595c68e494da9f'/>
<id>urn:sha1:4ee546b434504a618eac40421e595c68e494da9f</id>
<content type='text'>
This patch wraps changes to the CRx intercepts of SVM into
seperate functions to abstract nested-svm better and prepare
the implementation of the vmcb-clean-bits feature.

Signed-off-by: Joerg Roedel &lt;joerg.roedel@amd.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86: Push potential exception error code on task switches</title>
<updated>2010-05-17T09:17:46+00:00</updated>
<author>
<name>Jan Kiszka</name>
<email>jan.kiszka@siemens.com</email>
</author>
<published>2010-04-14T13:51:09+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=e269fb2189fb86d79d64c0ca74c6c1a549ad4aa3'/>
<id>urn:sha1:e269fb2189fb86d79d64c0ca74c6c1a549ad4aa3</id>
<content type='text'>
When a fault triggers a task switch, the error code, if existent, has to
be pushed on the new task's stack. Implement the missing bits.

Signed-off-by: Jan Kiszka &lt;jan.kiszka@siemens.com&gt;
Signed-off-by: Marcelo Tosatti &lt;mtosatti@redhat.com&gt;
</content>
</entry>
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