<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/x86/include/asm/msr.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
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<updated>2015-06-08T18:48:20+00:00</updated>
<entry>
<title>Merge branch 'x86/asm' into x86/core, to prepare for new patch</title>
<updated>2015-06-08T18:48:20+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2015-06-08T18:48:01+00:00</published>
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<id>urn:sha1:9dda1658a9bd450d65da5153a2427955785d17c2</id>
<content type='text'>
Collect all changes to arch/x86/entry/entry_64.S, before applying
patch that changes most of the file.

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86/uapi: Do not export &lt;asm/msr-index.h&gt; as part of the user API headers</title>
<updated>2015-06-07T13:36:04+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2015-06-04T16:55:26+00:00</published>
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<id>urn:sha1:b72e7464e4cf80117938e6adb8c22fdc1ca46d42</id>
<content type='text'>
This header containing all MSRs and respective bit definitions
got exported to userspace in conjunction with the big UAPI
shuffle.

But, it doesn't belong in the UAPI headers because userspace can
do its own MSR defines and exporting them from the kernel blocks
us from doing cleanups/renames in that header. Which is
ridiculous - it is not kernel's job to export such a header and
keep MSRs list and their names stable.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Acked-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: David Howells &lt;dhowells@redhat.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Link: http://lkml.kernel.org/r/1433436928-31903-19-git-send-email-bp@alien8.de
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86/asm/msr: Make wrmsrl_safe() a function</title>
<updated>2015-06-05T07:41:22+00:00</updated>
<author>
<name>Andy Lutomirski</name>
<email>luto@kernel.org</email>
</author>
<published>2015-06-05T00:13:44+00:00</published>
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<id>urn:sha1:cf991de2f614f454b3cb2a300c06ecdf69f3a70d</id>
<content type='text'>
The wrmsrl_safe macro performs invalid shifts if the value
argument is 32 bits.  This makes it unnecessarily awkward to
write code that puts an unsigned long into an MSR.

Convert it to a real inline function.

For inspiration, see:

  7c74d5b7b7b6 ("x86/asm/entry/64: Fix MSR_IA32_SYSENTER_CS MSR value").

Signed-off-by: Andy Lutomirski &lt;luto@kernel.org&gt;
Cc: &lt;linux-kernel@vger.kernel.org&gt;
Cc: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Cc: H. Peter Anvin &lt;hpa@zytor.com&gt;
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
[ Applied small improvements. ]
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86: Add another set of MSR accessor functions</title>
<updated>2014-03-13T22:34:45+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2014-03-09T17:05:23+00:00</published>
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<id>urn:sha1:22085a66c2fab6cf9b9393c056a3600a6b4735de</id>
<content type='text'>
We very often need to set or clear a bit in an MSR as a result of doing
some sort of a hardware configuration. Add generic versions of that
repeated functionality in order to save us a bunch of duplicated code in
the early CPU vendor detection/config code.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: http://lkml.kernel.org/r/1394384725-10796-2-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>x86 / msr: add 64bit _on_cpu access functions</title>
<updated>2013-10-16T22:36:06+00:00</updated>
<author>
<name>Jacob Pan</name>
<email>jacob.jun.pan@linux.intel.com</email>
</author>
<published>2013-10-11T23:54:58+00:00</published>
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<id>urn:sha1:1a6b991a9875a4c4811c7baf4058fa17aa1a9d9b</id>
<content type='text'>
Having 64-bit MSR access methods on given CPU can avoid shifting and
simplify MSR content manipulation. We already have other combinations
of rdmsrl_xxx and wrmsrl_xxx but missing the _on_cpu version.

Signed-off-by: Srinivas Pandruvada &lt;srinivas.pandruvada@linux.intel.com&gt;
Signed-off-by: Jacob Pan &lt;jacob.jun.pan@linux.intel.com&gt;
Reviewed-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
Signed-off-by: Rafael J. Wysocki &lt;rafael.j.wysocki@intel.com&gt;
</content>
</entry>
<entry>
<title>x86, msr: Unify variable names</title>
<updated>2013-04-02T23:03:32+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>bp@suse.de</email>
</author>
<published>2013-03-04T20:16:19+00:00</published>
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<id>urn:sha1:1423bed239415edd1562c25be8a7408858fdbb19</id>
<content type='text'>
Make sure all MSR-accessing primitives which split MSR values in
two 32-bit parts have their variables called 'low' and 'high' for
consistence with the rest of the code and for ease of staring.

Signed-off-by: Borislav Petkov &lt;bp@suse.de&gt;
Link: http://lkml.kernel.org/r/1362428180-8865-5-git-send-email-bp@alien8.de
Signed-off-by: H. Peter Anvin &lt;hpa@linux.intel.com&gt;
</content>
</entry>
<entry>
<title>UAPI: (Scripted) Disintegrate arch/x86/include/asm</title>
<updated>2012-12-14T22:37:13+00:00</updated>
<author>
<name>David Howells</name>
<email>dhowells@redhat.com</email>
</author>
<published>2012-12-14T22:37:13+00:00</published>
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<id>urn:sha1:af170c5061dd78512c469e6e2d211980cdb2c193</id>
<content type='text'>
Signed-off-by: David Howells &lt;dhowells@redhat.com&gt;
Acked-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
Acked-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Acked-by: Michael Kerrisk &lt;mtk.manpages@gmail.com&gt;
Acked-by: Paul E. McKenney &lt;paulmck@linux.vnet.ibm.com&gt;
Acked-by: Dave Jones &lt;davej@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'x86/cpu' into perf/core</title>
<updated>2012-07-05T19:12:11+00:00</updated>
<author>
<name>Ingo Molnar</name>
<email>mingo@kernel.org</email>
</author>
<published>2012-07-05T19:12:11+00:00</published>
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<id>urn:sha1:b0338e99b2a775c157e3e795f49fdcfb6c257f7a</id>
<content type='text'>
Merge this branch because we changed the wrmsr*_safe() API and there's
a conflict.

Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>x86, cpu: Rename checking_wrmsrl() to wrmsrl_safe()</title>
<updated>2012-06-07T20:32:04+00:00</updated>
<author>
<name>H. Peter Anvin</name>
<email>hpa@zytor.com</email>
</author>
<published>2012-06-07T20:32:04+00:00</published>
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<id>urn:sha1:715c85b1fc824e9cd0ea07d6ceb80d2262f32e90</id>
<content type='text'>
Rename checking_wrmsrl() to wrmsrl_safe(), to match the naming
convention used by all the other MSR access functions/macros.

Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
<entry>
<title>x86, cpu, amd: Deprecate AMD-specific MSR variants</title>
<updated>2012-06-07T18:43:30+00:00</updated>
<author>
<name>Borislav Petkov</name>
<email>borislav.petkov@amd.com</email>
</author>
<published>2012-06-01T14:52:38+00:00</published>
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<id>urn:sha1:2c929ce6f1ed1302be225512b433e6a6554f71a4</id>
<content type='text'>
Now that all users of {rd,wr}msr_amd_safe have been fixed, deprecate its
use by making them private to amd.c and adding warnings when used on
anything else beside K8.

Signed-off-by: Borislav Petkov &lt;borislav.petkov@amd.com&gt;
Link: http://lkml.kernel.org/r/1338562358-28182-5-git-send-email-bp@amd64.org
Acked-by: Konrad Rzeszutek Wilk &lt;konrad.wilk@oracle.com&gt;
Signed-off-by: H. Peter Anvin &lt;hpa@zytor.com&gt;
</content>
</entry>
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