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<title>BMC/Intel-BMC/linux.git/arch/x86/include/asm/kvm_host.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-07-10T11:25:26+00:00</updated>
<entry>
<title>KVM: count number of assigned devices</title>
<updated>2015-07-10T11:25:26+00:00</updated>
<author>
<name>Paolo Bonzini</name>
<email>pbonzini@redhat.com</email>
</author>
<published>2015-07-07T13:41:58+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=5544eb9b81940647b8fad1f251b37cbe2819ce44'/>
<id>urn:sha1:5544eb9b81940647b8fad1f251b37cbe2819ce44</id>
<content type='text'>
If there are no assigned devices, the guest PAT are not providing
any useful information and can be overridden to writeback; VMX
always does this because it has the "IPAT" bit in its extended
page table entries, but SVM does not have anything similar.
Hook into VFIO and legacy device assignment so that they
provide this information to KVM.

Reviewed-by: Alex Williamson &lt;alex.williamson@redhat.com&gt;
Tested-by: Joerg Roedel &lt;jroedel@suse.de&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86: make vapics_in_nmi_mode atomic</title>
<updated>2015-07-03T16:55:17+00:00</updated>
<author>
<name>Radim Krčmář</name>
<email>rkrcmar@redhat.com</email>
</author>
<published>2015-07-01T13:31:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=42720138b06301cc8a7ee8a495a6d021c4b6a9bc'/>
<id>urn:sha1:42720138b06301cc8a7ee8a495a6d021c4b6a9bc</id>
<content type='text'>
Writes were a bit racy, but hard to turn into a bug at the same time.
(Particularly because modern Linux doesn't use this feature anymore.)

Signed-off-by: Radim Krčmář &lt;rkrcmar@redhat.com&gt;
[Actually the next patch makes it much, much easier to trigger the race
 so I'm including this one for stable@ as well. - Paolo]
Cc: stable@vger.kernel.org
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm</title>
<updated>2015-06-24T16:36:49+00:00</updated>
<author>
<name>Linus Torvalds</name>
<email>torvalds@linux-foundation.org</email>
</author>
<published>2015-06-24T16:36:49+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=4e241557fc1cb560bd9e77ca1b4a9352732a5427'/>
<id>urn:sha1:4e241557fc1cb560bd9e77ca1b4a9352732a5427</id>
<content type='text'>
Pull first batch of KVM updates from Paolo Bonzini:
 "The bulk of the changes here is for x86.  And for once it's not for
  silicon that no one owns: these are really new features for everyone.

  Details:

   - ARM:
        several features are in progress but missed the 4.2 deadline.
        So here is just a smattering of bug fixes, plus enabling the
        VFIO integration.

   - s390:
        Some fixes/refactorings/optimizations, plus support for 2GB
        pages.

   - x86:
        * host and guest support for marking kvmclock as a stable
          scheduler clock.
        * support for write combining.
        * support for system management mode, needed for secure boot in
          guests.
        * a bunch of cleanups required for the above
        * support for virtualized performance counters on AMD
        * legacy PCI device assignment is deprecated and defaults to "n"
          in Kconfig; VFIO replaces it

        On top of this there are also bug fixes and eager FPU context
        loading for FPU-heavy guests.

   - Common code:
        Support for multiple address spaces; for now it is used only for
        x86 SMM but the s390 folks also have plans"

* tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (124 commits)
  KVM: s390: clear floating interrupt bitmap and parameters
  KVM: x86/vPMU: Enable PMU handling for AMD PERFCTRn and EVNTSELn MSRs
  KVM: x86/vPMU: Implement AMD vPMU code for KVM
  KVM: x86/vPMU: Define kvm_pmu_ops to support vPMU function dispatch
  KVM: x86/vPMU: introduce kvm_pmu_msr_idx_to_pmc
  KVM: x86/vPMU: reorder PMU functions
  KVM: x86/vPMU: whitespace and stylistic adjustments in PMU code
  KVM: x86/vPMU: use the new macros to go between PMC, PMU and VCPU
  KVM: x86/vPMU: introduce pmu.h header
  KVM: x86/vPMU: rename a few PMU functions
  KVM: MTRR: do not map huge page for non-consistent range
  KVM: MTRR: simplify kvm_mtrr_get_guest_memory_type
  KVM: MTRR: introduce mtrr_for_each_mem_type
  KVM: MTRR: introduce fixed_mtrr_addr_* functions
  KVM: MTRR: sort variable MTRRs
  KVM: MTRR: introduce var_mtrr_range
  KVM: MTRR: introduce fixed_mtrr_segment table
  KVM: MTRR: improve kvm_mtrr_get_guest_memory_type
  KVM: MTRR: do not split 64 bits MSR content
  KVM: MTRR: clean up mtrr default type
  ...
</content>
</entry>
<entry>
<title>KVM: x86/vPMU: Define kvm_pmu_ops to support vPMU function dispatch</title>
<updated>2015-06-23T12:12:14+00:00</updated>
<author>
<name>Wei Huang</name>
<email>wehuang@redhat.com</email>
</author>
<published>2015-06-19T13:45:05+00:00</published>
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<id>urn:sha1:25462f7f5295e2d3e9c2b31761ac95f0b3c8562f</id>
<content type='text'>
This patch defines a new function pointer struct (kvm_pmu_ops) to
support vPMU for both Intel and AMD. The functions pointers defined in
this new struct will be linked with Intel and AMD functions later. In the
meanwhile the struct that maps from event_sel bits to PERF_TYPE_HARDWARE
events is renamed and moved from Intel specific code to kvm_host.h as a
common struct.

Reviewed-by: Joerg Roedel &lt;jroedel@suse.de&gt;
Tested-by: Joerg Roedel &lt;jroedel@suse.de&gt;
Signed-off-by: Wei Huang &lt;wei@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86/vPMU: introduce pmu.h header</title>
<updated>2015-06-19T15:16:29+00:00</updated>
<author>
<name>Wei Huang</name>
<email>wehuang@redhat.com</email>
</author>
<published>2015-06-19T11:54:23+00:00</published>
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<id>urn:sha1:474a5bb944d2ad308a1360dcae72b16b8eecd250</id>
<content type='text'>
This will be used for private function used by AMD- and Intel-specific
PMU implementations.

Signed-off-by: Wei Huang &lt;wei@redhat.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: x86/vPMU: rename a few PMU functions</title>
<updated>2015-06-19T15:16:29+00:00</updated>
<author>
<name>Wei Huang</name>
<email>wehuang@redhat.com</email>
</author>
<published>2015-06-19T11:44:45+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=c6702c9dcfe72b63a85e7ae35533c11e2b7c1040'/>
<id>urn:sha1:c6702c9dcfe72b63a85e7ae35533c11e2b7c1040</id>
<content type='text'>
Before introducing a pmu.h header for them, make the naming more
consistent.

Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: MTRR: sort variable MTRRs</title>
<updated>2015-06-19T15:16:28+00:00</updated>
<author>
<name>Xiao Guangrong</name>
<email>guangrong.xiao@linux.intel.com</email>
</author>
<published>2015-06-15T08:55:31+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=19efffa244071ccd0385b240d03adb38feaab04e'/>
<id>urn:sha1:19efffa244071ccd0385b240d03adb38feaab04e</id>
<content type='text'>
Sort all valid variable MTRRs based on its base address, it will help us to
check a range to see if it's fully contained in variable MTRRs

Signed-off-by: Xiao Guangrong &lt;guangrong.xiao@linux.intel.com&gt;
[Fix list insertion sort, simplify var_mtrr_range_is_valid to just
 test the V bit. - Paolo]
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: MTRR: do not split 64 bits MSR content</title>
<updated>2015-06-19T15:16:27+00:00</updated>
<author>
<name>Xiao Guangrong</name>
<email>guangrong.xiao@linux.intel.com</email>
</author>
<published>2015-06-15T08:55:27+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=86fd52701cfae760711fb02a03c1ab8c80ea72f3'/>
<id>urn:sha1:86fd52701cfae760711fb02a03c1ab8c80ea72f3</id>
<content type='text'>
Variable MTRR MSRs are 64 bits which are directly accessed with full length,
no reason to split them to two 32 bits

Signed-off-by: Xiao Guangrong &lt;guangrong.xiao@linux.intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: MTRR: clean up mtrr default type</title>
<updated>2015-06-19T15:16:27+00:00</updated>
<author>
<name>Xiao Guangrong</name>
<email>guangrong.xiao@linux.intel.com</email>
</author>
<published>2015-06-15T08:55:26+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=10fac2dc2b3b549d371d67f57193362b6bcc6dfd'/>
<id>urn:sha1:10fac2dc2b3b549d371d67f57193362b6bcc6dfd</id>
<content type='text'>
Drop kvm_mtrr-&gt;enable, omit the decode/code workload and get rid of
all the hard code

Signed-off-by: Xiao Guangrong &lt;guangrong.xiao@linux.intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
<entry>
<title>KVM: MTRR: exactly define the size of variable MTRRs</title>
<updated>2015-06-19T15:16:27+00:00</updated>
<author>
<name>Xiao Guangrong</name>
<email>guangrong.xiao@linux.intel.com</email>
</author>
<published>2015-06-15T08:55:25+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=910a6aae4e2e45855efc4a268e43eed2d8445575'/>
<id>urn:sha1:910a6aae4e2e45855efc4a268e43eed2d8445575</id>
<content type='text'>
Only KVM_NR_VAR_MTRR variable MTRRs are available in KVM guest

Signed-off-by: Xiao Guangrong &lt;guangrong.xiao@linux.intel.com&gt;
Signed-off-by: Paolo Bonzini &lt;pbonzini@redhat.com&gt;
</content>
</entry>
</feed>
