<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/sh/mm/cache-sh4.c, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2014-03-04T15:55:49+00:00</updated>
<entry>
<title>sh: prefix sh-specific "CCR" and "CCR2" by "SH_"</title>
<updated>2014-03-04T15:55:49+00:00</updated>
<author>
<name>Geert Uytterhoeven</name>
<email>geert@linux-m68k.org</email>
</author>
<published>2014-03-03T23:38:33+00:00</published>
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<id>urn:sha1:a5f6ea29f9a918403629f8369ae55fac6b09cb53</id>
<content type='text'>
Commit bcf24e1daa94 ("mmc: omap_hsmmc: use the generic config for
omap2plus devices"), enabled the build for other platforms for compile
testing.

sh-allmodconfig now fails with:

    include/linux/omap-dma.h:171:8: error: expected identifier before numeric constant
    make[4]: *** [drivers/mmc/host/omap_hsmmc.o] Error 1

This happens because SuperH #defines "CCR", which is one of the enum
values in include/linux/omap-dma.h.  There's a similar issue with "CCR2"
on sh2a.

As "CCR" and "CCR2" are too generic names for global #defines, prefix
them with "SH_" to fix this.

Signed-off-by: Geert Uytterhoeven &lt;geert@linux-m68k.org&gt;
Signed-off-by: Andrew Morton &lt;akpm@linux-foundation.org&gt;
Signed-off-by: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
</content>
</entry>
<entry>
<title>sh: fix up fallout from system.h disintegration.</title>
<updated>2012-03-30T10:29:57+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2012-03-30T10:29:57+00:00</published>
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<id>urn:sha1:f03c4866d31e913a8dbc84f7d1459abdaf0bd326</id>
<content type='text'>
Quite a bit of fallout all over the place, nothing terribly exciting.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: remove the second argument of k[un]map_atomic()</title>
<updated>2012-03-20T13:48:15+00:00</updated>
<author>
<name>Cong Wang</name>
<email>amwang@redhat.com</email>
</author>
<published>2011-11-25T15:14:16+00:00</published>
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<id>urn:sha1:bc3e11be88010e09692ed1d214407d56caa90075</id>
<content type='text'>
Signed-off-by: Cong Wang &lt;amwang@redhat.com&gt;
</content>
</entry>
<entry>
<title>sh: Assume new page cache pages have dirty dcache lines.</title>
<updated>2010-12-01T06:39:51+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-12-01T06:39:51+00:00</published>
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<id>urn:sha1:55661fc1f105ed75852e937bf8ea408270eb0cca</id>
<content type='text'>
This follows the ARM change c01778001a4f5ad9c62d882776235f3f31922fdd
("ARM: 6379/1: Assume new page cache pages have dirty D-cache") for the
same rationale:

    There are places in Linux where writes to newly allocated page
    cache pages happen without a subsequent call to flush_dcache_page()
    (several PIO drivers including USB HCD). This patch changes the
    meaning of PG_arch_1 to be PG_dcache_clean and always flush the
    D-cache for a newly mapped page in update_mmu_cache().

This addresses issues seen with executing binaries from MMC, in
addition to some of the other HCDs that don't explicitly do cache
management for their pipe-in buffers.

Requested-by: Yoshihiro Shimoda &lt;yoshihiro.shimoda.uh@renesas.com&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Mass ctrl_in/outX to __raw_read/writeX conversion.</title>
<updated>2010-01-26T03:58:40+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-01-26T03:58:40+00:00</published>
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<id>urn:sha1:9d56dd3b083a3bec56e9da35ce07baca81030b03</id>
<content type='text'>
The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Kill off the special uncached section and fixmap.</title>
<updated>2010-01-21T07:05:25+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2010-01-21T07:05:25+00:00</published>
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<id>urn:sha1:2dc2f8e0c46864e2a3722c84eaa96513d4cf8b2f</id>
<content type='text'>
Now that cached_to_uncached works as advertized in 32-bit mode and we're
never going to be able to map &lt; 16MB anyways, there's no need for the
special uncached section. Kill it off.

Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Optimise flush_dcache_page() on SH4</title>
<updated>2010-01-02T00:51:52+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt@console-pimps.org</email>
</author>
<published>2009-12-24T22:17:35+00:00</published>
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<id>urn:sha1:b4c892762373c5e59c7e8db35f5f9a7658602bda</id>
<content type='text'>
If the page is not mapped into any process's address space then aliases
cannot exist in the cache. So reduce the amount of flushing we perform.

Signed-off-by: Matt Fleming &lt;matt@console-pimps.org&gt;
</content>
</entry>
<entry>
<title>sh: Can't compare physical and virtual addresses for aliases</title>
<updated>2009-12-09T03:34:46+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt@console-pimps.org</email>
</author>
<published>2009-12-08T14:23:11+00:00</published>
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<id>urn:sha1:e717cc6c07f006be36e35189aacb28be4e30ad14</id>
<content type='text'>
It does not make sense to compare virtual and physical addresses for
aliasing, only virtual addresses can be compared for aliases.

Signed-off-by: Matt Fleming &lt;matt@console-pimps.org&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>sh: Drop associative writes for SH-4 cache flushes.</title>
<updated>2009-12-04T07:18:11+00:00</updated>
<author>
<name>Matt Fleming</name>
<email>matt@console-pimps.org</email>
</author>
<published>2009-12-04T07:18:11+00:00</published>
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<id>urn:sha1:a781d1e5ff6277f80ff3c9503775521bc64cf131</id>
<content type='text'>
When flushing/invalidating the icache/dcache via the memory-mapped IC/OC
address arrays, the associative bit should only be used in conjunction with
virtual addresses. However, we currently flush cache lines based on physical
address, so stop using the associative bit.

It is a better strategy to use non-associative writes (and physical tags) for
flushing the caches anyway, because flushing by virtual address (as with the
A-bit set) requires a valid TLB entry for that virtual address. If one does not
exist in the TLB no exception is generated and the flush is silently ignored.

This is also future-proofing for SH-4A parts which are gradually phasing out
associative writes to the cache array due to the aforementioned case of certain
flushes silently turning in to nops.

Signed-off-by: Matt Fleming &lt;matt@console-pimps.org&gt;
Signed-off-by: Paul Mundt &lt;lethal@linux-sh.org&gt;
</content>
</entry>
<entry>
<title>Merge branch 'sh/stable-updates'</title>
<updated>2009-11-09T01:55:36+00:00</updated>
<author>
<name>Paul Mundt</name>
<email>lethal@linux-sh.org</email>
</author>
<published>2009-11-09T01:55:36+00:00</published>
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<id>urn:sha1:76d2318020bf0c0c497af986a25977196715a1b9</id>
<content type='text'>
</content>
</entry>
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