BMC/Intel-BMC/linux.git/arch/sh/kernel/cpu/sh2/entry.S, branch dev-4.6

sh: provide unified syscall trap compatible with all SH models

2016-03-17T19:46:06+00:00

Historically SH-2 Linux (and originally uClinux) used a syscall calling convention incompatible with the established SH-3/4 Linux ABI. This choice was made because the trap range used by the existing ABI, 0x10-0x17, overlaps with the hardware exception/interrupt trap range reserved by SH-2, and in particular, with the SH-2A divide-by-zero and division-overflow exceptions. Despite the documented syscall convention using the low bits of the trap number to signal the number of arguments the kernel should expect, no version of the kernel has ever used this information, nor is it useful; all of the registers need to be saved anyway. Therefore, it is possible to pick a new trap number, 0x1f, that is both supported by all existing SH-3/4 kernels and unassigned as a hardware trap in the SH-2 range. This makes it possible to produce SH-2 application binaries that are forwards-compatible with running on SH-3/4 kernels and to treat SH as a unified platform with varying ISA support levels rather than multiple gratuitously-incompatible platforms. This patch adjusts the range checking SH-2 and SH-2A kernels make for the syscall trap to accept the range 0x1f-0x2f rather than just 0x20-0x2f. As a result, trap 0x1f now acts as a syscall for all SH models. Signed-off-by: Rich Felker

sh: Make sure rte delay slots are nopped out on all parts.

2009-08-14T22:41:45+00:00

Future SH parts do not support any instruction but a nop in the rte delay slot, so make the change for all offending parts. SH-5 is excluded from this, and already has its own set of restrictions with regards to rte delay slot handling. Signed-off-by: Paul Mundt

sh: migrate to arch/sh/include/

2008-07-28T23:09:44+00:00

This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg Signed-off-by: Paul Mundt

sh2(A) exception handler update

2008-07-28T09:10:34+00:00

This patch is By sh2 - Remove duplicate code - Reduce stack usage - Cleanup and little optimize By sh2a - Add missing handler(256 to 511) - Use sh2a instructions handler Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt

sh: Fix up the address error exception handler for SH-2.

2008-03-13T10:43:07+00:00

Presently the SH-2/SH-2A address error exception dispatch copies off the register state from the stack and skips over the first register, skewing the rest. Fix up the math here so that the proper register state is handed down to the exception handler itself. Signed-off-by: Kieran Bingham Signed-off-by: Paul Mundt

sh: SH-2A FPU support.

2008-01-28T04:18:57+00:00

Signed-off-by: Kieran Bingham Signed-off-by: Paul Mundt

sh: Share bug/debug traps across _32 and _64.

2008-01-28T04:18:50+00:00

Signed-off-by: Paul Mundt

sh: Fixup misaligned data for sh2 lockdep.

2007-06-11T06:33:44+00:00

lockdep/irqflags tracing on SH-2 ends up with a misaligned branch, fix it. Signed-off-by: Paul Mundt

sh: Fix bogus regs pointer in do_IRQ().

2007-03-14T04:03:35+00:00

SH-3 and SH-4 were trampling the register, and SH-2 wasn't even setting it in the first place. This ended up with some rather broken behaviour in the sysrq show_regs(). Signed-off-by: Paul Mundt

sh: Update SH-2 to use the debug trap jump table.

2007-02-13T01:54:43+00:00

Signed-off-by: Yoshinori Sato Signed-off-by: Paul Mundt