BMC/Intel-BMC/linux.git/arch/sh/include/asm/bitops-llsc.h, branch devIntel OpenBMC Linux kernel source tree (mirror)https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev2009-01-29T02:57:09+00:00sh: Relax inline assembly constraints2009-01-29T02:57:09+00:00Matt Flemingmatt@console-pimps.org2009-01-20T21:14:37+00:00urn:sha1:42990701f938b9318e46102d9919ceb28e5b0e6d
When dereferencing the memory address contained in a register and
modifying the value at that memory address, the register should not be
listed in the inline asm outputs. The value at the memory address is an
output (which is taken care of with the "memory" clobber), not the register.
Signed-off-by: Matt Fleming <matt@console-pimps.org>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: Convert to generic bitops for IRQ-toggling implementation.2008-12-22T09:42:53+00:00Paul Mundtlethal@linux-sh.org2008-11-20T06:25:22+00:00urn:sha1:16b529d1d78060254d5bc735390915ca5ccf13a1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
sh: Provide movli.l/movco.l-based bitops.2008-09-08T01:35:02+00:00Paul Mundtlethal@linux-sh.org2008-08-07T08:36:12+00:00urn:sha1:742fd1bcfb475c702c9b1dd6afc79c08f8dbf7dd
Signed-off-by: Paul Mundt <lethal@linux-sh.org>