<feed xmlns='http://www.w3.org/2005/Atom'>
<title>BMC/Intel-BMC/linux.git/arch/score/include/asm/uaccess.h, branch dev</title>
<subtitle>Intel OpenBMC Linux kernel source tree (mirror)</subtitle>
<id>https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev</id>
<link rel='self' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/atom?h=dev'/>
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<updated>2015-05-19T06:39:14+00:00</updated>
<entry>
<title>mm/uaccess, mm/fault: Clarify that uaccess may only sleep if pagefaults are enabled</title>
<updated>2015-05-19T06:39:14+00:00</updated>
<author>
<name>David Hildenbrand</name>
<email>dahi@linux.vnet.ibm.com</email>
</author>
<published>2015-05-11T15:52:08+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=b3c395ef5556a6c60f4426cc060f5b7bdcf82d5b'/>
<id>urn:sha1:b3c395ef5556a6c60f4426cc060f5b7bdcf82d5b</id>
<content type='text'>
In general, non-atomic variants of user access functions must not sleep
if pagefaults are disabled.

Let's update all relevant comments in uaccess code. This also reflects
the might_sleep() checks in might_fault().

Reviewed-and-tested-by: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Signed-off-by: David Hildenbrand &lt;dahi@linux.vnet.ibm.com&gt;
Signed-off-by: Peter Zijlstra (Intel) &lt;peterz@infradead.org&gt;
Cc: David.Laight@ACULAB.COM
Cc: Linus Torvalds &lt;torvalds@linux-foundation.org&gt;
Cc: Peter Zijlstra &lt;peterz@infradead.org&gt;
Cc: Thomas Gleixner &lt;tglx@linutronix.de&gt;
Cc: airlied@linux.ie
Cc: akpm@linux-foundation.org
Cc: benh@kernel.crashing.org
Cc: bigeasy@linutronix.de
Cc: borntraeger@de.ibm.com
Cc: daniel.vetter@intel.com
Cc: heiko.carstens@de.ibm.com
Cc: herbert@gondor.apana.org.au
Cc: hocko@suse.cz
Cc: hughd@google.com
Cc: mst@redhat.com
Cc: paulus@samba.org
Cc: ralf@linux-mips.org
Cc: schwidefsky@de.ibm.com
Cc: yang.shi@windriver.com
Link: http://lkml.kernel.org/r/1431359540-32227-4-git-send-email-dahi@linux.vnet.ibm.com
Signed-off-by: Ingo Molnar &lt;mingo@kernel.org&gt;
</content>
</entry>
<entry>
<title>score: update inconsistent declare after .c was changed</title>
<updated>2009-08-30T04:30:16+00:00</updated>
<author>
<name>Chen Liqin</name>
<email>liqin.chen@sunplusct.com</email>
</author>
<published>2009-08-30T04:30:16+00:00</published>
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<id>urn:sha1:ffa818b4b099f65b6cb74750bdb979061716e020</id>
<content type='text'>
</content>
</entry>
<entry>
<title>score: add address space annotations</title>
<updated>2009-06-27T13:09:52+00:00</updated>
<author>
<name>Arnd Bergmann</name>
<email>arnd@arndb.de</email>
</author>
<published>2009-06-27T13:05:30+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=a1f8213b9518d0e9124a48a34bdd58b4bc2650e5'/>
<id>urn:sha1:a1f8213b9518d0e9124a48a34bdd58b4bc2650e5</id>
<content type='text'>
Annotate the address space for pointers that are used
correctly with __user and __iomem, so that sparse
can better warn about incorrect casts.

Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
<entry>
<title>score: Add support for Sunplus S+core architecture</title>
<updated>2009-06-19T09:38:47+00:00</updated>
<author>
<name>Chen Liqin</name>
<email>liqin.chen@sunplusct.com</email>
</author>
<published>2009-06-12T14:01:00+00:00</published>
<link rel='alternate' type='text/html' href='https://git.radix-linux.su/BMC/Intel-BMC/linux.git/commit/?id=6bc9a3966f0395419b09b2ec90f89f7f00341b37'/>
<id>urn:sha1:6bc9a3966f0395419b09b2ec90f89f7f00341b37</id>
<content type='text'>
This is the complete set of new arch Score's files for linux.
Score instruction set support 16bits, 32bits and 64bits instruction,
Score SOC had been used in game machine and LCD TV.

Signed-off-by: Chen Liqin &lt;liqin.chen@sunplusct.com&gt;
Signed-off-by: Arnd Bergmann &lt;arnd@arndb.de&gt;
</content>
</entry>
</feed>
