BMC/Intel-BMC/linux.git/arch/powerpc/kernel/head_64.S, branch dev-4.6

powerpc/book3e-64: Use hardcoded mttmr opcode

2016-03-16T04:22:16+00:00

This preserves the ability to build using older binutils (reportedly <= 2.22). Fixes: 6becef7ea04a ("powerpc/mpc85xx: Add CPU hotplug support for E6500") Signed-off-by: Scott Wood Cc: chenhui.zhao@freescale.com Signed-off-by: Michael Ellerman

powerpc/mpc85xx: Add CPU hotplug support for E6500

2016-03-05T05:58:38+00:00

Support Freescale E6500 core-based platforms, like t4240. Support disabling/enabling individual CPU thread dynamically. Signed-off-by: Chenhui Zhao

powerpc/rcpm: add RCPM driver

2016-03-05T05:50:27+00:00

There is a RCPM (Run Control/Power Management) in Freescale QorIQ series processors. The device performs tasks associated with device run control and power management. The driver implements some features: mask/unmask irq, enter/exit low power states, freeze time base, etc. Signed-off-by: Chenhui Zhao Signed-off-by: Tang Yuantian [scottwood: remove __KERNEL__ ifdef] Signed-off-by: Scott Wood

powerpc/book3e: support CONFIG_RELOCATABLE

2015-10-27T23:13:27+00:00

book3e is different with book3s since 3s includes the exception vectors code in head_64.S as it relies on absolute addressing which is only possible within this compilation unit. So we have to get that label address with got. And when boot a relocated kernel, we should reset ipvr properly again after .relocate. Signed-off-by: Tiejun Chen [scottwood: cleanup and ifdef removal] Signed-off-by: Scott Wood

powerpc/booke64: Fix args to copy_and_flush

2015-10-27T23:13:26+00:00

Convert r4/r5, not r6, to a virtual address when calling copy_and_flush. Otherwise, r3 is already virtual, and copy_to_flush tries to access r3+r6, PAGE_OFFSET gets added twice. This isn't normally seen because on book3e we normally enter with the kernel at zero and thus skip copy_to_flush -- but it will be needed for kexec support. Signed-off-by: Tiejun Chen [scottwood: split patch and rewrote changelog] Signed-off-by: Scott Wood

powerpc/e6500: kexec: Handle hardware threads

2015-10-27T23:13:25+00:00

The new kernel will be expecting secondary threads to be disabled, not spinning. Signed-off-by: Scott Wood

Merge remote-tracking branch 'scott/next' into next

2014-08-05T04:13:41+00:00

Scott writes: Highlights include e6500 hardware threading support, an e6500 TLB erratum workaround, corenet error reporting, support for a new board, and some minor fixes.

powerpc/e6500: Add support for hardware threads

2014-07-30T00:26:20+00:00

The general idea is that each core will release all of its threads into the secondary thread startup code, which will eventually wait in the secondary core holding area, for the appropriate bit in the PACA to be set. The kick_cpu function pointer will set that bit in the PACA, and thus "release" the core/thread to boot. We also need to do a few things that U-Boot normally does for CPUs (like enable branch prediction). Signed-off-by: Andy Fleming [scottwood@freescale.com: various changes, including only enabling threads if Linux wants to kick them] Signed-off-by: Scott Wood

powerpc: Remove STAB code

2014-07-28T04:10:22+00:00

Old cpus didn't have a Segment Lookaside Buffer (SLB), instead they had a Segment Table (STAB). Now that we've dropped support for those cpus, we can remove the STAB support entirely. Signed-off-by: Michael Ellerman Signed-off-by: Benjamin Herrenschmidt

powerpc: Fix SMP issues with ppc64le ABIv2

2014-04-23T00:05:26+00:00

There is no need to put a function descriptor in __secondary_hold_spinloop. Use ppc_function_entry to get the instruction address and put it in __secondary_hold_spinloop instead. Also fix an issue where we assumed cur_cpu_spec held a function descriptor. Signed-off-by: Anton Blanchard